公开(公告)号：US11621683B2

公开(公告)日：2023-04-04

申请号：US17162229

申请日：2021-01-29

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Wei Xu ,  Ravi Kummaraguntla ,  Paul Wilson ,  Mujo Kozak ,  Christian Larsen ,  John L. Melanson ,  Yongjie Cheng

IPC: H03F3/45

Abstract: A system may include a front end differential amplifier having two input terminals, two input resistors, each of the two input resistors coupled to a respective one of the two input terminals, and an input common mode biasing circuit for an output stage of the front end differential amplifier, the input common mode biasing circuit comprising two current sources configured to generate currents for biasing the output stage of the front end differential amplifier.

公开(公告)号：US20180324525A1

公开(公告)日：2018-11-08

申请号：US15586023

申请日：2017-05-03

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Vivek Saraf ,  Axel Thomsen ,  Ravi Kummaraguntla ,  John C. Tucker

IPC: H04R3/04 ,  H03H7/40

CPC classification number: H04R3/04 ,  H03F3/185 ,  H03F2200/03 ,  H03F2200/18 ,  H03H7/40 ,  H04R3/00 ,  H04R2201/003

Abstract: Input impedance biasing may be improved with an ultra-high-input-impedance biasing circuit having low temperature variation. The impedance biasing circuit may include a first transistor coupled to a first power supply and a second transistor coupled to a second power supply. A gate of the first transistor may be coupled to a gate of the second transistor at an intermediate bias node. The first transistor and the second transistor may provide a selected DC impedance at the intermediate bias node. The impedance may be used to provide low-pass and or high-pass filtering of audio signals and/or noise.

公开(公告)号：US10123117B1

公开(公告)日：2018-11-06

申请号：US15586023

申请日：2017-05-03

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Vivek Saraf ,  Axel Thomsen ,  Ravi Kummaraguntla ,  John C. Tucker

IPC: H04R3/00 ,  H04R3/04 ,  H03H7/40

CPC classification number: H04R3/04 ,  H03F3/185 ,  H03F2200/03 ,  H03F2200/18 ,  H03H7/40 ,  H04R3/00 ,  H04R2201/003

Abstract: Input impedance biasing may be improved with an ultra-high-input-impedance biasing circuit having low temperature variation. The impedance biasing circuit may include a first transistor coupled to a first power supply and a second transistor coupled to a second power supply. A gate of the first transistor may be coupled to a gate of the second transistor at an intermediate bias node. The first transistor and the second transistor may provide a selected DC impedance at the intermediate bias node. The impedance may be used to provide low-pass and or high-pass filtering of audio signals and/or noise.