公开(公告)号：US07858521B2

公开(公告)日：2010-12-28

申请号：US11614267

申请日：2006-12-21

申请人： Clifford F. Knollenberg ,  Mark R. Teepe ,  Christopher L. Chua

发明人： Clifford F. Knollenberg ,  Mark R. Teepe ,  Christopher L. Chua

IPC分类号： H01L21/44

CPC分类号： H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/81 ,  H01L33/62 ,  H01L2224/0401 ,  H01L2224/06102 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/1403 ,  H01L2224/16 ,  H01L2224/81801 ,  H01L2924/0001 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01049 ,  H01L2924/01072 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/00

摘要： A method of electroplating includes forming a seed region to be electroplated on a first portion of a substrate, forming a ground plane on a second portion of a substrate, electrically isolating the ground plane from the seed region, electroplating the region, wherein electroplating includes causing the ground plane and the region to make electrical connection, and then removing the ground plane region on the second portion of the substrate, but not removing the electrical isolation. This creates a structure having a substrate, a passivation layer on the substrate, and at least one electroplated, metal region on the substrate such that there is contiguous contact between the metal region and the passivation layer. And, after an additional flip-chip assembly to a bond pad/heat sinking chip, results in a device having a bond pad chip having bond pads, solder beads formed on the bond pads, and a component connected to the bond pads by the solder beads. Wherein, the component has a substrate, a passivation layer on the substrate, and at least one electroplated, metal region on the substrate such that there is contiguous contact between the metal region and the passivation layer.

摘要翻译： 一种电镀方法包括在衬底的第一部分上形成要电镀的种子区域，在衬底的第二部分上形成接地平面，将接地面与种子区域电隔离，对该区域进行电镀，其中电镀包括引起 接地面和区域进行电连接，然后去除衬底的第二部分上的接地平面区域，但不去除电隔离。 这产生了具有衬底，衬底上的钝化层以及衬底上的至少一个电镀的金属区域的结构，使得在金属区域和钝化层之间存在连续的接触。 并且，在对接合焊盘/散热芯片进行额外的倒装芯片组装之后，导致具有接合焊盘芯片的器件具有接合焊盘，形成在接合焊盘上的焊球，以及通过焊料连接到接合焊盘的部件 珠子 其中，所述部件具有衬底，衬底上的钝化层以及衬底上的至少一个电镀的金属区域，使得在金属区域和钝化层之间存在连续接触。

公开(公告)号：US20080153281A1

公开(公告)日：2008-06-26

申请号：US11614267

申请日：2006-12-21

申请人： Clifford F. Knollenberg ,  Mark R. Teepe ,  Christopher Chua

发明人： Clifford F. Knollenberg ,  Mark R. Teepe ,  Christopher Chua

IPC分类号： H01L21/44

CPC分类号： H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/81 ,  H01L33/62 ,  H01L2224/0401 ,  H01L2224/06102 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/1403 ,  H01L2224/16 ,  H01L2224/81801 ,  H01L2924/0001 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01049 ,  H01L2924/01072 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/00

摘要： A method of electroplating includes forming a seed region to be electroplated on a first portion of a substrate, forming a ground plane on a second portion of a substrate, electrically isolating the ground plane from the seed region, electroplating the region, wherein electroplating includes causing the ground plane and the region to make electrical connection, and then removing the ground plane region on the second portion of the substrate, but not removing the electrical isolation. This creates a structure having a substrate, a passivation layer on the substrate, and at least one electroplated, metal region on the substrate such that there is contiguous contact between the metal region and the passivation layer. And, after an additional flip-chip assembly to a bond pad/heat sinking chip, results in a device having a bond pad chip having bond pads, solder beads formed on the bond pads, and a component connected to the bond pads by the solder beads. Wherein, the component has a substrate, a passivation layer on the substrate, and at least one electroplated, metal region on the substrate such that there is contiguous contact between the metal region and the passivation layer.

摘要翻译： 一种电镀方法包括在衬底的第一部分上形成要电镀的种子区域，在衬底的第二部分上形成接地平面，将接地面与种子区域电隔离，对该区域进行电镀，其中电镀包括引起 接地面和区域进行电连接，然后去除衬底的第二部分上的接地平面区域，但不去除电隔离。 这产生了具有衬底，衬底上的钝化层以及衬底上的至少一个电镀的金属区域的结构，使得在金属区域和钝化层之间存在连续的接触。 并且，在对接合焊盘/散热芯片进行额外的倒装芯片组装之后，导致具有接合焊盘芯片的器件具有接合焊盘，形成在接合焊盘上的焊球，以及通过焊料连接到接合焊盘的部件 珠子 其中，所述部件具有衬底，衬底上的钝化层以及衬底上的至少一个电镀的金属区域，使得在金属区域和钝化层之间存在连续接触。

公开(公告)号：US20110062486A1

公开(公告)日：2011-03-17

申请号：US12949353

申请日：2010-11-18

申请人： Clifford F. Knollenberg ,  Mark R. Teepe ,  Christopher Chua

发明人： Clifford F. Knollenberg ,  Mark R. Teepe ,  Christopher Chua

IPC分类号： H01L33/00

CPC分类号： H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/81 ,  H01L33/62 ,  H01L2224/0401 ,  H01L2224/06102 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/1403 ,  H01L2224/16 ,  H01L2224/81801 ,  H01L2924/0001 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01049 ,  H01L2924/01072 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/00

摘要： A method of electroplating includes forming a seed region to be electroplated on a first portion of a substrate, forming a ground plane on a second portion of a substrate, electrically isolating the ground plane from the seed region, electroplating the region, wherein electroplating includes causing the ground plane and the region to make electrical connection, and then removing the ground plane region on the second portion of the substrate, but not removing the electrical isolation. This creates a structure having a substrate, a passivation layer on the substrate, and at least one electroplated, metal region on the substrate such that there is contiguous contact between the metal region and the passivation layer. And, after an additional flip-chip assembly to a bond pad/heat sinking chip, results in a device having a bond pad chip having bond pads, solder beads formed on the bond pads, and a component connected to the bond pads by the solder beads. Wherein, the component has a substrate, a passivation layer on the substrate, and at least one electroplated, metal region on the substrate such that there is contiguous contact between the metal region and the passivation layer.

摘要翻译： 一种电镀方法包括在衬底的第一部分上形成要电镀的种子区域，在衬底的第二部分上形成接地平面，将接地平面与种子区域电隔离，对该区域进行电镀，其中电镀包括引起 接地面和区域进行电连接，然后去除衬底的第二部分上的接地平面区域，但不去除电隔离。 这产生了具有衬底，衬底上的钝化层以及衬底上的至少一个电镀的金属区域的结构，使得在金属区域和钝化层之间存在连续的接触。 并且，在对接合焊盘/散热芯片进行额外的倒装芯片组装之后，导致具有接合焊盘芯片的器件具有接合焊盘，形成在接合焊盘上的焊球，以及通过焊料连接到接合焊盘的部件 珠子 其中，所述部件具有衬底，衬底上的钝化层以及衬底上的至少一个电镀的金属区域，使得在金属区域和钝化层之间存在连续接触。

公开(公告)号：US09099344B2

公开(公告)日：2015-08-04

申请号：US12949353

申请日：2010-11-18

申请人： Clifford F. Knollenberg ,  Mark R. Teepe ,  Christopher Chua

发明人： Clifford F. Knollenberg ,  Mark R. Teepe ,  Christopher Chua

IPC分类号： H01L23/00 ,  H01L33/62

CPC分类号： H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/81 ,  H01L33/62 ,  H01L2224/0401 ,  H01L2224/06102 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/1403 ,  H01L2224/16 ,  H01L2224/81801 ,  H01L2924/0001 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01049 ,  H01L2924/01072 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/00

摘要： A method of electroplating includes forming a seed region to be electroplated on a first portion of a substrate, forming a ground plane on a second portion of a substrate, electrically isolating the ground plane from the seed region, electroplating the region, wherein electroplating includes causing the ground plane and the region to make electrical connection, and then removing the ground plane region on the second portion of the substrate, but not removing the electrical isolation. This creates a structure having a substrate, a passivation layer on the substrate, and at least one electroplated, metal region on the substrate such that there is contiguous contact between the metal region and the passivation layer. And, after an additional flip-chip assembly to a bond pad/heat sinking chip, results in a device having a bond pad chip having bond pads, solder beads formed on the bond pads, and a component connected to the bond pads by the solder beads. Wherein, the component has a substrate, a passivation layer on the substrate, and at least one electroplated, metal region on the substrate such that there is contiguous contact between the metal region and the passivation layer.

摘要翻译： 一种电镀方法包括在衬底的第一部分上形成要电镀的种子区域，在衬底的第二部分上形成接地平面，将接地面与种子区域电隔离，对该区域进行电镀，其中电镀包括引起 接地面和区域进行电连接，然后去除衬底的第二部分上的接地平面区域，但不去除电隔离。 这产生了具有衬底，衬底上的钝化层以及衬底上的至少一个电镀的金属区域的结构，使得在金属区域和钝化层之间存在连续的接触。 并且，在对接合焊盘/散热芯片进行额外的倒装芯片组装之后，导致具有接合焊盘芯片的器件具有接合焊盘，形成在接合焊盘上的焊球，以及通过焊料连接到接合焊盘的部件 珠子 其中，所述部件具有衬底，衬底上的钝化层以及衬底上的至少一个电镀的金属区域，使得在金属区域和钝化层之间存在连续接触。

公开(公告)号：US20100148197A1

公开(公告)日：2010-06-17

申请号：US12337505

申请日：2008-12-17

申请人： David P. Bour ,  Clifford F. Knollenberg ,  Christopher L. Chua

发明人： David P. Bour ,  Clifford F. Knollenberg ,  Christopher L. Chua

IPC分类号： H01L21/268 ,  H01L33/00

CPC分类号： H01L21/268 ,  H01L33/007 ,  H01L33/12 ,  H01L33/22

摘要： A method of texturing a surface within or immediately adjacent to a template layer of a LED is described. The method uses a texturing laser directed through a substrate to decompose and pit a semiconductor material at the surface to be textured. By texturing the surface, light trapping within the template layer is reduced. Furthermore, by patterning the arrangement of pits, metal coating each pit can be arranged to spread current through the template layer and thus through the n-doped region of a LED.

摘要翻译： 描述了在LED的模板层内或紧邻LED的模板层内纹理化表面的方法。 该方法使用引导通过基底的纹理激光来分解和凹陷待纹理表面的半导体材料。 通过纹理化表面，减少了模板层内的光捕获。 此外，通过图案化凹坑的布置，可以布置每个凹坑的金属涂层以将电流扩散通过模板层，从而穿过LED的n掺杂区域。

公开(公告)号：US08581263B2

公开(公告)日：2013-11-12

申请号：US12337561

申请日：2008-12-17

申请人： Clifford F. Knollenberg ,  William S. Wong ,  Christopher L. Chua

发明人： Clifford F. Knollenberg ,  William S. Wong ,  Christopher L. Chua

IPC分类号： H01L29/72

CPC分类号： H01L21/268 ,  H01L21/0254 ,  H01L29/2003 ,  H01L29/66462 ,  H01L33/0075 ,  H01L33/0095

摘要： An embodiment is a method and apparatus to induce flaw formation in nitride semiconductors. Regions of a thin film structure are selectively decomposed within a thin film layer at an interface with a substrate to form flaws in a pre-determined pattern within the thin film structure. The flaws locally concentrate stress in the pre-determined pattern during a stress-inducing operation. The stress-inducing operation is performed. The stress-inducing operation causes the thin film layer to fracture at the pre-determined pattern.

摘要翻译： 一个实施方案是在氮化物半导体中诱导缺陷形成的方法和装置。 薄膜结构的区域在与基板的界面处的薄膜层内选择性地分解，以在薄膜结构内以预定图案形成缺陷。 在应力诱导操作期间，缺陷将应力局部集中在预定模式中。 执行应力诱导操作。 应力诱导操作导致薄膜层以预定图案断裂。

公开(公告)号：US08470619B2

公开(公告)日：2013-06-25

申请号：US12909548

申请日：2010-10-21

申请人： David P. Bour ,  Clifford F. Knollenberg ,  Christopher L. Chua

发明人： David P. Bour ,  Clifford F. Knollenberg ,  Christopher L. Chua

IPC分类号： H01L21/00

CPC分类号： H01L21/268 ,  H01L33/007 ,  H01L33/12 ,  H01L33/22

摘要： A method of texturing a surface within or immediately adjacent to a template layer of a LED is described. The method uses a texturing laser directed through a substrate to decompose and pit a semiconductor material at the surface to be textured. By texturing the surface, light trapping within the template layer is reduced. Furthermore, by patterning the arrangement of pits, metal coating each pit can be arranged to spread current through the template layer and thus through the n-doped region of a LED.

摘要翻译： 描述了在LED的模板层内或紧邻LED的模板层内纹理化表面的方法。 该方法使用引导通过基底的纹理激光来分解和凹陷待纹理表面的半导体材料。 通过纹理化表面，减少了模板层内的光捕获。 此外，通过图案化凹坑的布置，可以布置每个凹坑的金属涂层以将电流扩散通过模板层，从而穿过LED的n掺杂区域。

公开(公告)号：US20100151602A1

公开(公告)日：2010-06-17

申请号：US12337491

申请日：2008-12-17

申请人： Clifford F. Knollenberg ,  David P. Bour ,  Christopher L. Chua ,  Jeng Ping Lu

发明人： Clifford F. Knollenberg ,  David P. Bour ,  Christopher L. Chua ,  Jeng Ping Lu

IPC分类号： H01L21/268

CPC分类号： H01L33/0095 ,  H01L33/22 ,  Y10S438/964

摘要： An improved method of forming a LED with a roughened surface is described. Traditional methods of roughening a LED surface utilizes strong etchants that require sealing or protecting exposed areas of the LED. The described method uses a focused laser to separate the LED from the substrate, and a second laser to roughen the LED surface thereby avoiding the use of strong etchants. A mild etchant may be used on the laser roughened LED surface to remove unwanted metals.

摘要翻译： 描述了形成具有粗糙表面的LED的改进方法。 传统的LED表面粗糙化方法使用强蚀刻剂，需要密封或保护LED的暴露区域。 所描述的方法使用聚焦激光器将LED与基板分开，以及第二激光器来使LED表面粗糙化，从而避免使用强蚀刻剂。 激光粗糙化的LED表面可以使用温和的蚀刻剂去除不需要的金属。

公开(公告)号：US20110039360A1

公开(公告)日：2011-02-17

申请号：US12909548

申请日：2010-10-21

申请人： David P. Bour ,  Clifford F. Knollenberg ,  Christopher L. Chua

发明人： David P. Bour ,  Clifford F. Knollenberg ,  Christopher L. Chua

IPC分类号： H01L33/58

CPC分类号： H01L21/268 ,  H01L33/007 ,  H01L33/12 ,  H01L33/22

摘要： A method of texturing a surface within or immediately adjacent to a template layer of a LED is described. The method uses a texturing laser directed through a substrate to decompose and pit a semiconductor material at the surface to be textured. By texturing the surface, light trapping within the template layer is reduced. Furthermore, by patterning the arrangement of pits, metal coating each pit can be arranged to spread current through the template layer and thus through the n-doped region of a LED.

摘要翻译： 描述了在LED的模板层内或紧邻LED的模板层内纹理化表面的方法。 该方法使用引导通过基底的纹理激光来分解和凹陷待纹理表面的半导体材料。 通过纹理化表面，减少了模板层内的光捕获。 此外，通过图案化凹坑的布置，可以布置每个凹坑的金属涂层以将电流扩散通过模板层，从而穿过LED的n掺杂区域。

公开(公告)号：US20100148188A1

公开(公告)日：2010-06-17

申请号：US12337561

申请日：2008-12-17

申请人： Clifford F. Knollenberg ,  William S. Wong ,  Christopher L. Chua

发明人： Clifford F. Knollenberg ,  William S. Wong ,  Christopher L. Chua

IPC分类号： H01L33/00 ,  H01L21/78 ,  H01L29/66

CPC分类号： H01L21/268 ,  H01L21/0254 ,  H01L29/2003 ,  H01L29/66462 ,  H01L33/0075 ,  H01L33/0095

摘要： An embodiment is a method and apparatus to induce flaw formation in nitride semiconductors. Regions of a thin film structure are selectively decomposed within a thin film layer at an interface with a substrate to form flaws in a pre-determined pattern within the thin film structure. The flaws locally concentrate stress in the pre-determined pattern during a stress-inducing operation. The stress-inducing operation is performed. The stress-inducing operation causes the thin film layer to fracture at the pre-determined pattern.

摘要翻译： 一个实施方案是在氮化物半导体中诱导缺陷形成的方法和装置。 薄膜结构的区域在与基板的界面处的薄膜层内选择性地分解，以在薄膜结构内以预定图案形成缺陷。 在应力诱导操作期间，缺陷将应力局部集中在预定模式中。 执行应力诱导操作。 应力诱导操作导致薄膜层以预定图案断裂。