Pixel having an oxide layer with step region
    2.
    发明授权
    Pixel having an oxide layer with step region 有权
    具有带步进区域的氧化物层的像素

    公开(公告)号:US07312484B1

    公开(公告)日:2007-12-25

    申请号:US11350298

    申请日:2006-02-07

    IPC分类号: H01L31/0328

    CPC分类号: H01L27/14603

    摘要: A semiconductor structure, having a doped well region being formed in a substrate layer and a transistor having a terminal provided within said doped well region. The semiconductor structure also includes an oxide layer formed over the substrate layer, the doped well region, a poly silicon region, and the terminal of the transistor. The oxide layer including a step region being located where a height of the oxide layer transitions from a height associated with the doped well region to a height associated with the terminal of the transistor.

    摘要翻译: 一种半导体结构,其具有在衬底层中形成的掺杂阱区和在所述掺杂阱区内具有端子的晶体管。 半导体结构还包括在衬底层上形成的氧化物层,掺杂阱区,多晶硅区和晶体管的端子。 氧化物层包括步骤区域,其中氧化物层的高度从与掺杂阱区域相关联的高度转变到与晶体管的端子相关联的高度。

    Gate n-well/p-substrate photodiode
    3.
    发明授权
    Gate n-well/p-substrate photodiode 有权
    栅极n阱/ p衬底光电二极管

    公开(公告)号:US07180111B1

    公开(公告)日:2007-02-20

    申请号:US10752845

    申请日:2004-01-07

    IPC分类号: H01L31/113

    CPC分类号: H01L27/14603

    摘要: A photodiode sensor structure includes a first dopant type substrate with a first surface and a second dopant type well region with a second surface. The second dopant type well region is formed in the first dopant type substrate such that the first surface and the second surface are substantially co-planar to form a diode surface. An interface between the second dopant type well region and the first dopant type substrate at the diode surface forms a diode junction. A poly silicon region is formed along the periphery of the entire diode junction. The poly silicon region provides the p-n junction of the photodiode with a physical shield to prevent any process damage from being introduced after the poly silicon processing (including damages from processes such as dielectric deposition/pattern, metal deposition/pattern, and/or via/contact hole etching), thereby reducing leakage current. The poly silicon region can also provide the p-n junction of the photodiode with an electrical shield to prevent any possible trapped charges at higher levels of dielectric above the junctions to affect the surface potential and/or prevent the formation of conducting channels between the p-n regions, thereby reducing leakage current.

    摘要翻译: 光电二极管传感器结构包括具有第一表面的第一掺杂剂型衬底和具有第二表面的第二掺杂剂型阱区。 第二掺杂剂型阱区形成在第一掺杂剂型衬底中,使得第一表面和第二表面基本上共面以形成二极管表面。 在二极管表面处的第二掺杂剂型阱区和第一掺杂剂型衬底之间的界面形成二极管结。 沿着整个二极管结的周边形成多晶硅区域。 多晶硅区域提供光电二极管的pn结与物理屏蔽,以防止在多晶硅处理之后引入任何工艺损坏(包括诸如介电沉积/图案,金属沉积/图案和/或通孔/ 接触孔蚀刻),从而减少漏电流。 多晶硅区域还可以提供光电二极管的pn结与电屏蔽,以防止在结点之上的较高电介质层处的任何可能的俘获电荷影响表面电势和/或防止在pn区域之间形成导电通道, 从而减少漏电流。

    Photodiode having extended well region
    4.
    发明授权
    Photodiode having extended well region 有权
    具有扩展井区的光电二极管

    公开(公告)号:US07173299B1

    公开(公告)日:2007-02-06

    申请号:US11350296

    申请日:2006-02-07

    IPC分类号: H01L31/062 H01L31/113

    CPC分类号: H01L27/14643 H01L27/14603

    摘要: A semiconductor imager structure having a photodiode being provided as a well region formed within a substrate layer and a transistor electrically connected to the photodiode and having a terminal that has a same electrical potential as the photodiode. The well region of the photodiode having an extended portion so that at least a portion of the terminal of the transistor has the same electrical potential as the photodiode is formed within the extended portion of the well region of the photodiode.

    摘要翻译: 提供具有光电二极管作为形成在衬底层内的阱区的半导体成像器结构和与该光电二极管电连接且具有与该光电二极管具有相同电位的端子的晶体管。 光电二极管的阱区具有延伸部分,使得晶体管的端子的至少一部分具有与光电二极管的阱区域的延伸部分内的光电二极管相同的电位。

    Method and system for delta double sampling

    公开(公告)号:US08796036B2

    公开(公告)日:2014-08-05

    申请号:US13173851

    申请日:2011-06-30

    IPC分类号: G01N15/06 G01N27/414

    摘要: An array of sensors arranged in matched pairs of transistors with an output formed on a first transistor and a sensor formed on the second transistor of the matched pair. The matched pairs are arranged such that the second transistor in the matched pair is read through the output of the first transistor in the matched pair. The first transistor in the matched pair is forced into the saturation (active) region to prevent interference from the second transistor on the output of the first transistor. A sample is taken of the output. The first transistor is then placed into the linear region allowing the sensor formed on the second transistor to be read through the output of the first transistor. A sample is taken from the output of the sensor reading of the second transistor. A difference is formed of the two samples.

    Chemical detection circuit including a serializer circuit
    6.
    发明授权
    Chemical detection circuit including a serializer circuit 有权
    化学检测电路包括串行化电路

    公开(公告)号:US08487790B2

    公开(公告)日:2013-07-16

    申请号:US13174562

    申请日:2011-06-30

    IPC分类号: H03M9/00

    摘要: The described embodiments may provide a chemical detection circuit. The chemical detection circuit may comprise a pixel array, a pair of analog-to-digital converter (ADC) circuit blocks, a pair of input/output (I/O) circuit blocks coupled to the pair of ADC circuit blocks respectively, and a plurality of serial link terminals coupled to the pair of IO circuit blocks. The pixel array may comprise a plurality of chemically-sensitive pixels formed in columns and rows. Each chemically-sensitive pixel may comprise: a chemically-sensitive transistor, and a row selection device.

    摘要翻译: 所描述的实施例可以提供化学检测电路。 化学检测电路可以包括像素阵列,一对模数转换器(ADC)电路块,分别耦合到该对ADC电路块的一对输入/输出(I / O)电路块,以及一 耦合到所述一对IO电路块的多个串行链路终端。 像素阵列可以包括以列和行形成的多个化学敏感像素。 每个化学敏感像素可以包括:化学敏感晶体管和行选择器件。

    CMOS active pixel with hard and soft reset

    公开(公告)号:US07489354B2

    公开(公告)日:2009-02-10

    申请号:US10752112

    申请日:2004-01-06

    IPC分类号: H04N5/335

    摘要: A circuit for a pixel site in an imaging array includes a light-detecting element to convert incident light to a photocurrent and a reset transistor, operatively connected to the light-detecting element, to reset a voltage associated with the light-detecting element. The reset transistor hard resets the voltage associated with the light-detecting element and soft resets the voltage associated with the light-detecting element after the generation of the hard reset of the voltage associated with the light-detecting element. A pixel voltage of a column or row line is also measured by hard resetting the column or row line voltage to a first predetermined voltage; soft resetting the column or row line voltage to a first pixel voltage; hard resetting the column or row line voltage to a second predetermined voltage; soft resetting the column or row line voltage to a second pixel voltage; and determining a difference between the first and second pixel voltages, the difference being the measured pixel voltage.

    Linear variable gain amplifiers
    9.
    发明授权

    公开(公告)号:US06630864B2

    公开(公告)日:2003-10-07

    申请号:US10341020

    申请日:2003-01-13

    申请人: Jungwook Yang

    发明人: Jungwook Yang

    IPC分类号: H03F345

    摘要: A system and method of controlling the operation of linear variable-gain amplifiers to allow for such linear variable gain amplifiers to have a wider operating range at high current levels, control inputs for selectable gains and improved low-voltage operation. In a first mode, the amplifier includes an additional source of current to allow for an enhanced operating range. In a second embodiment, the amplifier includes a plurality of selective resistive levels and a selection system which allows the selection of one of the resistive levels which, in turn, controls the gain range of the amplifier system of the present invention. A third embodiment of the present invention illustrates the use of an amplifier system useful for a low voltage input signal to reduce errors caused by variations in the base to emitter in the two transistors providing the amplification. Also disclosed are embodiments for reducing the error in the amplifier output by providing additional stages to provide error reducing components which are added to the amplifier output.

    Linear variable gain amplifiers
    10.
    发明授权
    Linear variable gain amplifiers 有权
    线性可变增益放大器

    公开(公告)号:US06563382B1

    公开(公告)日:2003-05-13

    申请号:US09685813

    申请日:2000-10-10

    申请人: Jungwook Yang

    发明人: Jungwook Yang

    IPC分类号: H03F345

    摘要: A system and method of controlling the operation of linear variable-gain amplifiers to allow for such linear variable gain amplifiers to have a wider operating range at high current levels, control inputs for selectable gains and improved low-voltage operation. In a first mode, the amplifier includes an additional source of current to allow for an enhanced operating range. In a second embodiment, the amplifier includes a plurality of selective resistive levels and a selection system which allows the selection of one of the resistive levels which, in turn, controls the gain range of the amplifier system of the present invention. A third embodiment of the present invention illustrates the use of an amplifier system useful for a low voltage input signal to reduce errors caused by variations in the base to emitter in the two transistors providing the amplification. Also disclosed are embodiments for reducing the error in the amplifier output by providing additional stages to provide error reducing components which are added to the amplifier output.

    摘要翻译: 控制线性可变增益放大器的操作的系统和方法,以允许这种线性可变增益放大器在高电流水平下具有更宽的工作范围,控制输入以获得可选择的增益和改进的低电压操作。 在第一模式中,放大器包括额外的电流源以允许增强的操作范围。 在第二实施例中,放大器包括多个选择性电阻电平和选择系统,其允许选择电阻电平中的一个,这进而控制本发明的放大器系统的增益范围。 本发明的第三实施例示出了对于低电压输入信号有用的放大器系统的用途,以减少由提供放大的两个晶体管中的基极到发射极的变化引起的误差。 还公开了用于通过提供附加级来提供放大器输出中的误差减小部件来减小放大器输出中的误差的实施例。