SiP (system in package) design systems and methods
    1.
    发明授权
    SiP (system in package) design systems and methods 有权
    SiP(系统封装)设计系统和方法

    公开(公告)号:US07565635B2

    公开(公告)日:2009-07-21

    申请号:US11697744

    申请日:2007-04-09

    IPC分类号: G06F17/50 G06F9/45

    CPC分类号: G06F17/5045 G06F2217/40

    摘要: SiP design systems and methods. The system comprises a system partitioning module, a subsystem integration module, a physical design module, and an analysis module. The system partitioning module partitions a target system into subsystem partitions according to partition criteria. The subsystem integration module generates an architecture design and/or a cost estimation for the target system according to the subsystem partitions, at least one SiP platform, and IC geometry data. The physical design module generates a SiP physical design with physical routing for the target system according to the architecture design, the subsystem partitions, the SiP platform, and the IC geometry data. The analysis module performs a performance check within the subsystem partitions based on the SiP physical design and/or simulations of the target system.

    摘要翻译: SiP设计系统和方法。 该系统包括系统分区模块,子系统集成模块,物理设计模块和分析模块。 系统分区模块根据分区标准将目标系统划分为子系统分区。 子系统集成模块根据子系统分区,至少一个SiP平台和IC几何数据生成目标系统的架构设计和/或成本估算。 物理设计模块根据架构设计,子系统分区,SiP平台和IC几何数据,为目标系统生成具有物理路由的SiP物理设计。 分析模块基于SiP物理设计和/或目标系统的模拟来执行子系统分区内的性能检查。

    SIP (SYSTEM IN PACKAGE) DESIGN SYSTEMS AND METHODS
    2.
    发明申请
    SIP (SYSTEM IN PACKAGE) DESIGN SYSTEMS AND METHODS 有权
    SIP(系统封装)设计系统和方法

    公开(公告)号:US20080250182A1

    公开(公告)日:2008-10-09

    申请号:US11697744

    申请日:2007-04-09

    IPC分类号: G06F13/14

    CPC分类号: G06F17/5045 G06F2217/40

    摘要: SiP design systems and methods. The system comprises a system partitioning module, a subsystem integration module, a physical design module, and an analysis module. The system partitioning module partitions a target system into subsystem partitions according to partition criteria. The subsystem integration module generates an architecture design and/or a cost estimation for the target system according to the subsystem partitions, at least one SiP platform, and IC geometry data. The physical design module generates a SiP physical design with physical routing for the target system according to the architecture design, the subsystem partitions, the SiP platform, and the IC geometry data. The analysis module performs a performance check within the subsystem partitions based on the SiP physical design and/or simulations of the target system.

    摘要翻译: SiP设计系统和方法。 该系统包括系统分区模块,子系统集成模块,物理设计模块和分析模块。 系统分区模块根据分区标准将目标系统划分为子系统分区。 子系统集成模块根据子系统分区,至少一个SiP平台和IC几何数据生成目标系统的架构设计和/或成本估算。 物理设计模块根据架构设计,子系统分区,SiP平台和IC几何数据,为目标系统生成具有物理路由的SiP物理设计。 分析模块基于SiP物理设计和/或目标系统的模拟来执行子系统分区内的性能检查。

    Design techniques for stacking identical memory dies
    3.
    发明授权
    Design techniques for stacking identical memory dies 有权
    堆叠相同内存模块的设计技术

    公开(公告)号:US07494846B2

    公开(公告)日:2009-02-24

    申请号:US11716104

    申请日:2007-03-09

    IPC分类号: H01L21/8242

    摘要: A semiconductor structure includes a first semiconductor die and a second semiconductor die identical to the first semiconductor die. The first semiconductor die includes a first identification circuit; and a first plurality of input/output (I/O) pads on the surface of the first semiconductor die. The second semiconductor die includes a second identification circuit, wherein the first and the second identification circuits are programmed differently from each other; and a second plurality of I/O pads on the surface of the second semiconductor die. Each of the first plurality of I/O pads is vertically aligned to and connected to one of the respective second plurality of I/O pads. The second semiconductor die is vertically aligned to and bonded on the first semiconductor die.

    摘要翻译: 半导体结构包括与第一半导体管芯相同的第一半导体管芯和第二半导体管芯。 第一半导体管芯包括第一识别电路; 以及在第一半导体管芯的表面上的第一多个输入/输出(I / O)焊盘。 第二半导体管芯包括第二识别电路,其中第一和第二识别电路被编程为彼此不同; 以及在第二半导体管芯的表面上的第二多个I / O焊盘。 第一组多个I / O焊盘中的每一个垂直对准并连接到相应的第二多个I / O焊盘之一。 第二半导体管芯垂直对齐并接合在第一半导体管芯上。

    Design techniques for stacking identical memory dies
    4.
    发明申请
    Design techniques for stacking identical memory dies 有权
    堆叠相同内存模块的设计技术

    公开(公告)号:US20080220565A1

    公开(公告)日:2008-09-11

    申请号:US11716104

    申请日:2007-03-09

    IPC分类号: H01L21/50

    摘要: A semiconductor structure includes a first semiconductor die and a second semiconductor die identical to the first semiconductor die. The first semiconductor die includes a first identification circuit; and a first plurality of input/output (I/O) pads on the surface of the first semiconductor die. The second semiconductor die includes a second identification circuit, wherein the first and the second identification circuits are programmed differently from each other; and a second plurality of I/O pads on the surface of the second semiconductor die. Each of the first plurality of I/O pads is vertically aligned to and connected to one of the respective second plurality of I/O pads. The second semiconductor die is vertically aligned to and bonded on the first semiconductor die.

    摘要翻译: 半导体结构包括与第一半导体管芯相同的第一半导体管芯和第二半导体管芯。 第一半导体管芯包括第一识别电路; 以及在第一半导体管芯的表面上的第一多个输入/输出(I / O)焊盘。 第二半导体管芯包括第二识别电路,其中第一和第二识别电路被编程为彼此不同; 以及在第二半导体管芯的表面上的第二多个I / O焊盘。 第一组多个I / O焊盘中的每一个垂直对准并连接到相应的第二多个I / O焊盘之一。 第二半导体管芯垂直对齐并接合在第一半导体管芯上。

    System and method for protecting and integrating silicon intellectual property (IP) in an integrated circuit (IC)
    5.
    发明授权
    System and method for protecting and integrating silicon intellectual property (IP) in an integrated circuit (IC) 失效
    在集成电路(IC)中保护和集成硅知识产权(IP)的系统和方法

    公开(公告)号:US06925614B2

    公开(公告)日:2005-08-02

    申请号:US10404246

    申请日:2003-04-01

    CPC分类号: G06F17/5045

    摘要: System and method for integrated circuit (IC) design using silicon intellectual property (IP) libraries that permits the protecting of the designs of circuits in the silicon IP while allowing correctness verification of the IC design. A preferred embodiment comprises a phantom cell (for example, phantom cell 505) that contains circuit elements (for example, circuit element EL-A 510) connected to each input/output pin of the phantom cell. The inclusion of the circuit elements permits an engineering design tool to check for improperly connected wiring.

    摘要翻译: 使用硅知识产权(IP)库的集成电路(IC)设计的系统和方法,允许保护硅IP电路中的电路设计,同时允许IC设计的正确性验证。 优选实施例包括包含连接到幻像单元的每个输入/输出引脚的电路元件(例如,电路元件EL-A 510)的幻影单元(例如,幻影单元505)。 包括电路元件允许工程设计工具检查不正确连接的布线。

    AUDIO-OPTICAL CONVERSION DEVICE AND CONVERSION METHOD THEREOF
    7.
    发明申请
    AUDIO-OPTICAL CONVERSION DEVICE AND CONVERSION METHOD THEREOF 审中-公开
    音频转换装置及其转换方法

    公开(公告)号:US20130269503A1

    公开(公告)日:2013-10-17

    申请号:US13448792

    申请日:2012-04-17

    申请人: Louis Liu

    发明人: Louis Liu

    IPC分类号: G10H1/00

    CPC分类号: G10H1/0008 G10H2220/411

    摘要: An audio-optical conversion device and a conversion method thereof, comprising: a plurality of audio intensity identifiers, a plurality of light source drivers, and a plurality of light emitting elements. The audio intensity identifiers receive a sound signal, and each audio intensity identifier identifies from the sound signal audio signals of different frequencies and different volume intensities, and then outputs the audio signals. Each audio intensity identifier is connected directly to the light source driver, to receive the corresponding audio signal, and converts it into a corresponding electrical signal. Each light source driver is connected to each light emitting element, to receive corresponding electrical signal, and generates a corresponding optical signal, hereby achieving a stereo and in-depth audio-optical effect of a real scene.

    摘要翻译: 一种音频光转换装置及其转换方法,包括:多个音频强度标识符,多个光源驱动器和多个发光元件。 音频强度标识符接收声音信号,并且每个音频强度标识符从声音信号识别不同频率和不同音量强度的音频信号,然后输出音频信号。 每个音频强度标识符直接连接到光源驱动器,以接收对应的音频信号,并将其转换成相应的电信号。 每个光源驱动器连接到每个发光元件,以接收对应的电信号,并产生相应的光信号,从而实现真实场景的立体和深度音频 - 光学效果。

    Pointing device having computer host
    8.
    发明授权
    Pointing device having computer host 失效
    指点装置有电脑主机

    公开(公告)号:US06606244B1

    公开(公告)日:2003-08-12

    申请号:US09394295

    申请日:1999-09-10

    申请人: Louis Liu Grace Chang

    发明人: Louis Liu Grace Chang

    IPC分类号: H05K720

    摘要: The present invention discloses a pointing device having a computer host. The present invention comprises a cursor move device for moving the cursor and a command input device for inputting commands to the computer host. Among these, the computer host further includes a mother board, a CPU, a memory and at least one connecting port. Via the connecting ports, user interface such as a display and a keyboard can be connected to the present invention to form a complete computer.

    摘要翻译: 本发明公开了一种具有计算机主机的指示装置。 本发明包括用于移动光标的光标移动装置和用于向计算机主机输入命令的命令输入装置。 其中,计算机主机还包括母板,CPU,存储器和至少一个连接端口。 通过连接端口,可以将诸如显示器和键盘的用户界面连接到本发明以形成完整的计算机。

    Method and system for misfire detection
    9.
    发明授权
    Method and system for misfire detection 有权
    失火检测方法与系统

    公开(公告)号:US07591172B2

    公开(公告)日:2009-09-22

    申请号:US11691762

    申请日:2007-03-27

    IPC分类号: G01M15/11

    CPC分类号: G01M15/11

    摘要: A method for determining a misfire condition includes receiving crankshaft acceleration data. The method further includes routing the received data through at least one of a plurality of processing paths and through a startup path and determining a crankshaft revolution count. The method further includes comparing the determined crankshaft accelerations over the determined revolution count to at least one threshold crankshaft acceleration value over the determined revolution count and determining a misfire condition from one of the startup path and the processing path based on the comparison.

    摘要翻译: 用于确定失火状态的方法包括接收曲轴加速度数据。 该方法还包括通过多个处理路径中的至少一个并通过启动路径路由所接收的数据,并确定曲轴转数。 该方法还包括将确定的转速计算的确定的曲轴加速度与所确定的转数进行比较,至少一个阈值曲轴加速度值,以及基于该比较从启动路径和处理路径之一确定失火状态。

    Safety plug
    10.
    发明授权
    Safety plug 失效
    安全插头

    公开(公告)号:US5176539A

    公开(公告)日:1993-01-05

    申请号:US853581

    申请日:1992-03-18

    申请人: Louis Liu

    发明人: Louis Liu

    IPC分类号: H01R13/68

    CPC分类号: H01R13/68

    摘要: A safety plug comprising a plastic casing having two separate wire holes for inserting the positive and negative conductors of an electric wire and a chamber on a top edge thereof covered by a cover, said chamber having a first female projection and a second female projection connected by a fuse, said cover having two male projections respectively inserted into holes on said first and second female projections to secure said fuse in place, wherein the positive plug pin is connected to said first female projection, the negative plug pin is directly connected to the negative conductor of said electric wire, and the positive conductor of said electric wire is connected to said second female projection. The fuse is burnt out to cut off the circuit upon overload on the electric wire.

    摘要翻译: 一种安全插头,包括具有两个单独的线孔的塑料外壳,用于将电线的正和负导体以及由盖覆盖的顶部边缘的腔室插入,所述腔室具有第一阴突起和第二阴突起, 保险丝,所述盖具有分别插入所述第一和第二阴突起中的孔中的两个凸形凸起,以将所述保险丝固定就位,其中所述正插头销连接到所述第一阴突起,所述负插头销直接连接到所述负极 所述电线的导体和所述电线的正导体连接到所述第二阴突起。 在电线过载时,保险丝烧坏以切断电路。