-
公开(公告)号：US10510576B2
公开(公告)日：2019-12-17
申请号：US14511411
申请日：2014-10-10
Applicant: Corning Incorporated
Inventor： Darwin Gene Enicks , John Tyler Keech , Aric Bruce Shorey , Windsor Pipes Thomas, III
IPC: H01L21/48 , H01L23/00 , H01L23/15 , H01L21/683 , H01L23/498
Abstract: A thin sheet (20) disposed on a carrier (10) via a surface modification layer (30) to form an article (2), wherein the article may be subjected to high temperature processing, as in FEOL semiconductor processing, not outgas and have the thin sheet maintained on the carrier without separation therefrom during the processing, yet be separated therefrom upon room temperature peeling force that leaves the thinner one of the thin sheet and carrier intact. Interposers (56) having arrays (50) of vias (60) may be formed on the thin sheet, and devices (66) formed on the interposers. Alternatively, the thin sheet may be a substrate on which semiconductor circuits are formed during FEOL processing.
-
公开(公告)号：US10106457B2
公开(公告)日：2018-10-23
申请号：US14359806
申请日：2012-11-14
Applicant: Corning Incorporated
Inventor： Robert Addison Boudreau , Darwin Gene Enicks , Charles Andrew Paulson , Gary Richard Trott
IPC: C03C17/245 , C03B17/06 , C23C16/455
Abstract: A method of coating a surface of a glass ribbon during a drawing process using atmospheric vapor deposition is provided. The method includes forming a glass ribbon in a viscoelastic state, desirably with a fusion draw. The glass ribbon is drawn in the viscoelastic state. The glass ribbon is cooled in the viscoelastic state into an elastic state. The glass ribbon is directed into an open end of a reactor. The reactor includes multiple channels. A first channel directs a first reactant gas, a second channel directs a second reactant gas and one or more third channels draw excess reactant, or purge it with inert gas flow, or both.
-
公开(公告)号：US10026911B2
公开(公告)日：2018-07-17
申请号：US15404714
申请日：2017-01-12
Applicant: Corning Incorporated
Inventor： Darwin Gene Enicks , Mingqian He , Robert George Manley
Abstract: An organic thin film transistor comprising a first gate, a second gate, a semiconducting layer located between the first gate and second gate and configured to operate as a channel and a source electrode and a drain electrode connected to opposing sides of the semiconductor layer. The organic thin film transistor also comprises a first dielectric layer located between the first gate and the semiconducting layer in a direction of current flow through the semiconductor layer, the first dielectric layer comprising a polar elastomeric dielectric material that exhibits a double layer charging effect when a set voltage is applied to the first gate and a second dielectric layer located between the second gate and the semiconducting layer.
-
公开(公告)号：US10014177B2
公开(公告)日：2018-07-03
申请号：US14047514
申请日：2013-10-07
Applicant: Corning Incorporated
Inventor： Robert Alan Bellman , Dana Craig Bookbinder , Robert George Manley , Prantik Mazumder , Theresa Chang , Jeffrey John Domey , Darwin Gene Enicks , Vasudha Ravichandran , Alan Thomas Stephens, II , John Christopher Thomas
CPC classification number: H01L21/2007 , H01L51/003 , H01L51/0097 , H01L2227/326 , H01L2251/5338 , Y02E10/549 , Y02P70/521 , Y10T156/10 , Y10T156/1052
Abstract: Methods for making electronic devices on thin sheets bonded to carriers. A surface modification layer and associated heat treatments, may be provided on a sheet, a carrier, or both, to control both room-temperature van der Waals (and/or hydrogen) bonding and high temperature covalent bonding between the thin sheet and carrier during the electronic device processing. The room-temperature bonding is controlled so as to be sufficient to hold the thin sheet and carrier together during vacuum processing, wet processing, and/or ultrasonic cleaning processing, during the electronic device processing. And at the same time, the high temperature covalent bonding is controlled so as to prevent a permanent bond between the thin sheet and carrier during high temperature processing, during the electronic device processing, as well as maintain a sufficient bond to prevent delamination during high temperature processing.
-
公开(公告)号：US09561982B2
公开(公告)日：2017-02-07
申请号：US14244570
申请日：2014-04-03
Applicant: Corning Incorporated
Inventor： Darwin Gene Enicks , Yoshihiro Nakamura , Siva Venkatachalam , Wanda Janina Walczak , Liming Wang
CPC classification number: C03C23/0075 , B08B3/08 , B08B3/12 , B08B11/04 , H01L21/02041
Abstract: A method of cleaning thin glass substrates comprises applying a sequence of chemical washing steps as the thin glass substrate is being conveyed in a conveyance direction. In addition, surfaces of the glass substrate may be treated to enhance electrostatic discharge properties of the glass substrates.
Abstract translation: 一种清洁薄玻璃基板的方法包括当薄型玻璃基板在输送方向上传送时，施加一系列化学清洗步骤。 此外，可以处理玻璃基板的表面以增强玻璃基板的静电放电性能。
-
Patent Agency Ranking
公开(公告)号：US20140318578A1
公开(公告)日：2014-10-30
申请号：US14244570
申请日：2014-04-03
Applicant: Corning Incorporated
Inventor： Darwin Gene Enicks , Yoshihiro Nakamura , Siva Venkatachalam , Wanda Janina Walczak , Liming Wang
CPC classification number: C03C23/0075 , B08B3/08 , B08B3/12 , B08B11/04 , H01L21/02041
Abstract: A method of cleaning thin glass substrates comprises applying a sequence of chemical washing steps as the thin glass substrate is being conveyed in a conveyance direction. In addition, surfaces of the glass substrate may be treated to enhance electrostatic discharge properties of the glass substrates.
Abstract translation: 一种清洁薄玻璃基板的方法包括当薄型玻璃基板在输送方向上传送时，施加一系列化学清洗步骤。 此外，可以处理玻璃基板的表面以增强玻璃基板的静电放电性能。
-
公开(公告)号：US10086584B2
公开(公告)日：2018-10-02
申请号：US14047506
申请日：2013-10-07
Applicant: Corning Incorporated
Inventor： Robert Alan Bellman , Dana Craig Bookbinder , Robert George Manley , Prantik Mazumder , Theresa Chang , Jeffrey John Domey , Darwin Gene Enicks , Vasudha Ravichandran , Alan Thomas Stephens, II , John Christopher Thomas
Abstract: Surface modification layers and associated heat treatments, that may be provided on a sheet, a carrier, or both, to control both room-temperature van der Waals (and/or hydrogen) bonding and high temperature covalent bonding between the thin sheet and carrier. The room-temperature bonding is controlled so as to be sufficient to hold the thin sheet and carrier together during vacuum processing, wet processing, and/or ultrasonic cleaning processing, for example. And at the same time, the high temperature covalent bonding is controlled so as to prevent a permanent bond between the thin sheet and carrier during high temperature processing, as well as maintain a sufficient bond to prevent delamination during high temperature processing.
-
公开(公告)号：US20170207403A1
公开(公告)日：2017-07-20
申请号：US15404714
申请日：2017-01-12
Applicant: Corning Incorporated
Inventor： Darwin Gene Enicks , Mingqian He , Robert George Manley
IPC: H01L51/05 , H01L29/49 , H03K17/041 , H01L29/16
CPC classification number: H01L51/052 , H01L29/1606 , H01L29/4908 , H01L51/0036 , H01L51/004 , H01L51/0043 , H01L51/0047 , H01L51/0554 , H01L51/0558 , H03K17/04106
Abstract: An organic thin film transistor comprising a first gate, a second gate, a semiconducting layer located between the first gate and second gate and configured to operate as a channel and a source electrode and a drain electrode connected to opposing sides of the semiconductor layer. The organic thin film transistor also comprises a first dielectric layer located between the first gate and the semiconducting layer in a direction of current flow through the semiconductor layer, the first dielectric layer comprising a polar elastomeric dielectric material that exhibits a double layer charging effect when a set voltage is applied to the first gate and a second dielectric layer located between the second gate and the semiconducting layer.
-
公开(公告)号：US09703010B2
公开(公告)日：2017-07-11
申请号：US14174993
申请日：2014-02-07
Applicant: CORNING INCORPORATED
Inventor： Charles Andrew Paulson , Darwin Gene Enicks , Jean-Francois Oudard , James Joseph Price , Jue Wang
CPC classification number: G02B1/115 , C09D5/006 , G02B1/105 , G02B1/14 , Y10T428/24975 , Y10T428/24983 , Y10T428/265
Abstract: Methods and articles are provide for: a substrate having first and second opposing surfaces; an intermediate layer substantially covering the first surface of the substrate, the intermediate layer being between about 1-5 microns in thickness and having a hardness of at least 15 GPa; a first outer layer substantially covering the intermediate layer; and a second outer layer substantially covering the first outer layer, and having a hardness of at least 15 GPa.
-
10.发明申请CARRIER-BONDING METHODS AND ARTICLES FOR SEMICONDUCTOR AND INTERPOSER PROCESSING 审中-公开用于半导体和介质处理的载体接合方法和文章公开(公告)号：US20150102498A1
公开(公告)日：2015-04-16
申请号：US14511411
申请日：2014-10-10
Applicant: Corning Incorporated
Inventor： Darwin Gene Enicks , John Tyler Keech , Aric Bruce Shorey , Windsor Pipes Thomas, III
IPC: H01L21/683 , H01L23/00 , H01L23/498
Abstract: A thin sheet (20) disposed on a carrier (10) via a surface modification layer (30) to form an article (2), wherein the article may be subjected to high temperature processing, as in FEOL semiconductor processing, not outgas and have the thin sheet maintained on the carrier without separation therefrom during the processing, yet be separated therefrom upon room temperature peeling force that leaves the thinner one of the thin sheet and carrier intact. Interposers (56) having arrays (50) of vias (60) may be formed on the thin sheet, and devices (66) formed on the interposers. Alternatively, the thin sheet may be a substrate on which semiconductor circuits are formed during FEOL processing.
Abstract translation: 一种经由表面改性层（30）设置在载体（10）上以形成制品（2）的薄片（20），其中所述制品可以经受高温处理，如在FEOL半导体加工中，不排气并具有 在加工过程中，薄片保持在载体上而不与其分离，然后在室温剥离力下将其从其中分离出来，使得薄片和载体中的较薄的一个完整。 具有通孔（60）阵列（50）的插入件（56）可以形成在薄片上，以及形成在插入件上的器件（66）。 或者，薄片可以是在FEOL处理期间形成半导体电路的基板。
-
-
-
-
-
-
-
-
-
Search Results
10
records
(took 0.014 seconds)
