公开(公告)号：US20050068051A1

公开(公告)日：2005-03-31

申请号：US10672804

申请日：2003-09-27

申请人： Curtis Tesdahl ,  Ronald Peiffer

发明人： Curtis Tesdahl ,  Ronald Peiffer

IPC分类号： G01R31/303 ,  G01R31/312 ,  G01R31/302

CPC分类号： G01R31/312

摘要： Disclosed is a novel method and apparatus for acquiring multiple capacitively sensed measurements from a circuit under test. Multiple digital sources are respectively connected to stimulate multiple respective first ends of multiple respective nets of interest. Respective second ends of the multiple respective nets of interest are capacitively sensed. The respective capacitively coupled signals are digitally sampled and shift correlated with respective expected digital signatures. If a high level of correlation is found for a given net, the net is electrically intact; otherwise, the net is characterized by either an open or some other fault that prevents it from meeting specification.

摘要翻译： 公开了一种用于从被测电路获取多个电容感测测量的新颖方法和装置。 多个数字源分别连接以刺激多个相关感兴趣的网络的多个相应的第一端。 感兴趣的多个相应的网络的相应的第二端被电容性地感测。 相应的电容耦合信号被数字采样并与相应的预期数字签名相关。 如果给定网络发现高水平的相关性，网络是电气完整的; 否则，网络的特征在于打开或其他一些故障，阻止其满足规范。

公开(公告)号：US20060076960A1

公开(公告)日：2006-04-13

申请号：US11287913

申请日：2005-11-28

申请人： Curtis Tesdahl ,  Ronald Peiffer

发明人： Curtis Tesdahl ,  Ronald Peiffer

IPC分类号： G01R31/08

CPC分类号： G01R31/312

摘要： Disclosed is a novel method and apparatus for acquiring multiple capacitively sensed measurements from a circuit under test. Multiple digital sources are respectively connected to stimulate multiple respective first ends of multiple respective nets of interest. Respective second ends of the multiple respective nets of interest are capacitively sensed. The respective capacitively coupled signals are digitally sampled and shift correlated with respective expected digital signatures. If a high level of correlation is found for a given net, the net is electrically intact; otherwise, the net is characterized by either an open or some other fault that prevents it from meeting specification.

公开(公告)号：US20060076959A1

公开(公告)日：2006-04-13

申请号：US11287768

申请日：2005-11-28

申请人： Curtis Tesdahl ,  Ronald Peiffer

发明人： Curtis Tesdahl ,  Ronald Peiffer

IPC分类号： G01R31/08

CPC分类号： G01R31/312

摘要： Disclosed is a novel method and apparatus for acquiring multiple capacitively sensed measurements from a circuit under test. Multiple digital sources are respectively connected to stimulate multiple respective first ends of multiple respective nets of interest. Respective second ends of the multiple respective nets of interest are capacitively sensed. The respective capacitively coupled signals are digitally sampled and shift correlated with respective expected digital signatures. If a high level of correlation is found for a given net, the net is electrically intact; otherwise, the net is characterized by either an open or some other fault that prevents it from meeting specification.

公开(公告)号：US20060139017A1

公开(公告)日：2006-06-29

申请号：US11024120

申请日：2004-12-28

申请人： Ronald Peiffer ,  Robert McAuliffe

发明人： Ronald Peiffer ,  Robert McAuliffe

IPC分类号： G05F1/40 ,  G05F1/618

CPC分类号： G01R31/2889 ,  G01R31/2841 ,  H03K17/08142 ,  H03K17/6871 ,  H03K19/00361 ,  H03K2017/0806

摘要： An electronic interface circuit. The electronic interface circuit includes a stimulus circuit which further includes a first voltage source, a driver circuit having first and second driver outputs, a first switch having first-switch input, first-switch output, and first-switch control input, a first filter having first-filter input and first-filter output, a second switch having second-switch input, second-switch output, and second-switch control input, and a second filter having second-filter input and second-filter output. The output of the first voltage source is connected to the first-switch input; the first driver output is connected to the first-switch control input; the first-switch output is connected to the first-filter input; the second-switch input is connected to a reference potential; the second driver output is connected to the second-switch control input; the second-switch output is connected to the second-filter input; and the first-filter output is connected to the second-filter output.

摘要翻译： 电子接口电路。 电子接口电路包括激励电路，其还包括第一电压源，具有第一和第二驱动器输出的驱动器电路，具有第一开关输入，第一开关输出和第一开关控制输入的第一开关，第一滤波器 具有第一滤波器输入和第一滤波器输出，具有第二开关输入，第二开关输出和第二开关控制输入的第二开关，以及具有第二滤波器输入和第二滤波器输出的第二滤波器。 第一电压源的输出连接到第一开关输入; 第一个驱动器输出连接到第一个开关控制输入; 第一开关输出连接到第一滤波器输入; 第二开关输入连接到参考电位; 第二驱动器输出连接到第二开关控制输入; 第二开关输出连接到第二滤波器输入; 并且第一滤波器输出连接到第二滤波器输出。

公开(公告)号：US20060139824A1

公开(公告)日：2006-06-29

申请号：US11233710

申请日：2005-09-23

申请人： Dayton Norrgard ,  Ronald Peiffer ,  Kevin Wible

发明人： Dayton Norrgard ,  Ronald Peiffer ,  Kevin Wible

IPC分类号： H02H9/00

CPC分类号： G01R31/31924 ,  G01R31/31932

摘要： In one embodiment, voltages are discharged from a circuit under test by, after pins of a circuit tester have been coupled to nodes of the circuit under test, making a first one of the pins an active pin and executing a current discharge process for the active pin. The current discharge process couples a current discharge circuit to the active pin, and then enables the current discharge circuit. A voltage of the active pin is then measured and, if the measured voltage is within a defined window, the active pin is coupled to ground. However, if the measured voltage is outside of the defined window after the current discharge circuit has been enabled for a predetermined period of time, the active pin is marked as not discharged. The current discharged circuit is then disabled and decoupled from the active pin. Thereafter, a next one of the pins is made the active pin, and the current discharged process is caused to be repeated.

摘要翻译： 在一个实施例中，电压从被测电路放电，在电路测试器的引脚连接到被测电路的节点之后，使第一个引脚成为有效引脚，并执行当前的放电过程 销。 电流放电过程将电流放电电路耦合到有源引脚，然后使能放电电路。 然后测量有源引脚的电压，如果测量的电压在定义的窗口内，则有源引脚耦合到地。 然而，如果在当前放电电路已经使能了预定时间段之后测量的电压在定义的窗口之外，则有源引脚被标记为不放电。 电流放电电路然后被禁止并且从有效引脚去耦。 此后，将下一个引脚作为有源引脚，并且使电流放电过程重复。

公开(公告)号：US20060139087A1

公开(公告)日：2006-06-29

申请号：US11023893

申请日：2004-12-28

申请人： Ronald Peiffer ,  Kevin Wible

发明人： Ronald Peiffer ,  Kevin Wible

IPC分类号： G05F1/10

CPC分类号： G01R31/31924 ,  G01R31/31932

摘要： An electronic discharge circuit. The discharge circuit includes a first current source having first current source input and output and a current control circuit having first, second, third, and fourth control contacts. An electronic circuit element of an electronic circuit has first and second element contacts. If first control contact and first current source input are electrically connected, second control contact and first current source output are electrically connected, third control contact and first element contact are electrically connected, and fourth control contact and second element contact are electrically connected, and if the electronic circuit element is electronically charged, current discharging the electronic circuit element is limited to the current from the first current source, otherwise when so connected, current discharging the electronic circuit element is zero and current from the first current source flows into the second control contact and out the first control contact.

摘要翻译： 电子放电电路。 放电电路包括具有第一电流源输入和输出的第一电流源和具有第一，第二，第三和第四控制触点的电流控制电路。 电子电路的电子电路元件具有第一和第二元件触点。 如果第一控制触点和第一电流源输入电连接，则第二控制触点和第一电流源输出电连接，第三控制触点和第一元件触点电连接，并且第四控制触点和第二元件触头电连接，并且如果 电子电路元件被电荷充电，电流放电电子电路元件被限制为来自第一电流源的电流，否则当这样连接时，电子电路元件的电流放电为零，并且来自第一电流源的电流流入第二控制 联系并出来第一个控制联系人。

公开(公告)号：US20050061540A1

公开(公告)日：2005-03-24

申请号：US10670649

申请日：2003-09-24

申请人： Kenneth Parker ,  Ronald Peiffer ,  Glen Leinbach

发明人： Kenneth Parker ,  Ronald Peiffer ,  Glen Leinbach

IPC分类号： G01R31/28 ,  H05K1/02 ,  H05K3/34 ,  H05K1/11 ,  H05K1/00

CPC分类号： H05K1/0268 ,  G01R31/2805 ,  G01R31/2818 ,  H05K3/3452 ,  H05K3/3484 ,  H05K2201/0989 ,  H05K2203/043

摘要： A test access point structure for accessing test points of a printed circuit board and method of fabrication thereof is presented. In an x-, y-, z-coordinate system where traces are printed along an x-y plane, the z-dimension is used to implement test access point structures. Each test access point structure is conductively connected to a trace at a test access point directly on top of the trace and along the z axis of the x-, y-, z-coordinate system above an exposed surface of the printed circuit board to be accessible for electrical probing by an external device.

摘要翻译： 介绍了一种用于访问印刷电路板测试点的测试接入点结构及其制造方法。 在沿x-y平面打印痕迹的x，y，z坐标系中，z维用于实现测试接入点结构。 每个测试接入点结构在测试接入点处直接连接到轨迹顶部的迹线上，并且沿x，y，z坐标系的z轴在印刷电路板的暴露表面上导电连接为 可通过外部设备进行电气探测。