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33 条记录 (耗时 0.017 秒)

    Multi-ported nonvolatile memory device with bank allocation and related systems and methods
    1.
    发明授权
    Multi-ported nonvolatile memory device with bank allocation and related systems and methods 有权

    公开(公告)号：US11449441B2

    公开(公告)日：2022-09-20

    申请号：US17327460

    申请日：2021-05-21

    申请人： Cypress Semiconductor Corporation

    发明人： Yoram Betser ,  Cliff Zitlaw ,  Stephan Rosner ,  Kobi Danon ,  Amir Rochman

    IPC分类号： G06F13/16 ,  G06F13/42

    摘要： A memory device that includes a first port and a second port. The first port includes a first clock input, at least one first command address input, and at least one data input or output configured to transfer data in relation to the memory device. The second port includes a second clock input and at least one command, address, and data input/output (I/O) configured to receive command and address information from, and to transfer data in relation to the memory device. The memory device also includes a plurality of memory banks, in which two different memory banks may be accessed respectively by the first and the second ports concurrently. Other embodiments of the memory device and related methods and systems are also disclosed.

    MICROCONTROLLER ENERGY PROFILER
    2.
    发明申请
    MICROCONTROLLER ENERGY PROFILER 有权

    公开(公告)号：US20210373634A1

    公开(公告)日：2021-12-02

    申请号：US17317528

    申请日：2021-05-11

    申请人： Cypress Semiconductor Corporation

    发明人： Christian Wiencke ,  Hans Van Antwerpen ,  Stephan Rosner ,  Roland Richter ,  Jean-Paul Vanitegem ,  Jan-Willem Van de Waerdt

    IPC分类号： G06F1/28 ,  G06F11/30 ,  G06F1/3206 ,  G06F1/3234 ,  G06F13/42

    摘要： A method is disclosed to estimate energy consumed by a component in a microcontroller during operation including identifying “event” activities, where the energy consumed by the component may be determined by the number of events executed by the component, and “duration” activities, where the energy consumed may be determined by the duration of time required to execute of the activity, and determining the energy consumed by the component based on the number of events/duration of time and an energy coefficient which corresponds to the amount of energy consumed by the component to execute the activity, under given operating conditions. In an embodiment, data transfers at a bus interface may represent event activities. Apparatus to estimate the energy consumed is disclosed including bus monitors to receive signals representing data transfers at a bus interface and provide signals indicating the number of data transfers executed.

    Multi-ported nonvolatile memory device with bank allocation and related systems and methods
    4.
    发明授权
    Multi-ported nonvolatile memory device with bank allocation and related systems and methods 有权

    公开(公告)号：US11030128B2

    公开(公告)日：2021-06-08

    申请号：US16719493

    申请日：2019-12-18

    申请人： Cypress Semiconductor Corporation

    发明人： Yoram Betser ,  Cliff Zitlaw ,  Stephan Rosner ,  Kobi Danon ,  Amir Rochman

    IPC分类号： G06F13/16 ,  G06F13/42

    摘要： A nonvolatile memory device can include a serial port having at least one serial clock input, and at least one serial data input/output (I/O) configured to receive command, address and write data in synchronism with the at least one serial clock input. At least one parallel port can include a plurality of command address inputs configured to receive command and address data in groups of parallel bits and a plurality of unidirectional data outputs configured to output read data in parallel on rising and falling edges of a data clock signal. Each of a plurality of banks can include nonvolatile memory cells and be configurable for access by the serial port or the parallel port. When a bank is configured for access by the serial port, the bank is not accessible by the at least one parallel port. Related methods and systems are also disclosed.

    SECURED COMMUNICATION FROM WITHIN NON-VOLATILE MEMORY DEVICE
    6.
    发明申请
    SECURED COMMUNICATION FROM WITHIN NON-VOLATILE MEMORY DEVICE 有权

    公开(公告)号：US20220231995A1

    公开(公告)日：2022-07-21

    申请号：US17591824

    申请日：2022-02-03

    申请人： Cypress Semiconductor Corporation

    发明人： Sergey Ostrikov ,  Stephan Rosner ,  Clifford Zitlaw

    IPC分类号： H04L9/40 ,  G06F21/78 ,  G06F13/42

    摘要： An apparatus includes a non-volatile memory (NVM) device coupled to a host, the NVM device including a processing device to: receive a communication packet from a server via the host computing system that is coupled to the NVM device and communicatively coupled to the server, the communication packet comprising clear text data that requests to initiate secure communications; perform a secure handshake with the server, via communication through the host computing system, using a secure protocol that generates a session key; receive data, via the host computing system, from the server within a secure protocol packet, wherein the data is inaccessible to the host computing system; authenticate the data using secure protocol metadata of the secure protocol packet; optionally decrypt, using the session key, the data to generate plaintext data; and store the plaintext data in NVM storage elements of the NVM device.

    Booting an application from multiple memories
    7.
    发明授权
    Booting an application from multiple memories 有权

    公开(公告)号：US11481315B2

    公开(公告)日：2022-10-25

    申请号：US17012636

    申请日：2020-09-04

    申请人： Cypress Semiconductor Corporation

    发明人： Stephan Rosner ,  Qamrul Hasan ,  Venkat Natarajan

    IPC分类号： G06F12/02 ,  G06F9/4401 ,  G06F9/445

    摘要： A method includes using a memory address map, locating a first portion of an application in a first memory and loading a second portion of the application from a second memory. The method includes executing in place from the first memory the first portion of the application, during a first period, and by completion of the loading of the second portion of the application from the second memory. The method further includes executing the second portion of the application during a second period, wherein the first period precedes the second period.

    Securing data logs in memory devices
    8.
    发明授权
    Securing data logs in memory devices 有权

    公开(公告)号：US11210238B2

    公开(公告)日：2021-12-28

    申请号：US16358236

    申请日：2019-03-19

    申请人： Cypress Semiconductor Corporation

    发明人： Avi Avanindra ,  Stephan Rosner ,  Cliff Zitlaw

    IPC分类号： G06F12/00 ,  G06F12/14 ,  G06F13/42 ,  G06F21/60 ,  G06F21/44

    摘要： An apparatus including non-volatile memory to store a forensic key and data, the data received from a host computing system. A processing device is coupled to the non-volatile memory and is to: allow writing the data, by the host computing system, to a region of the non-volatile memory; in response to a lock signal received from the host computing system, assert a lock on the region of the non-volatile memory, the lock to cause a restriction on access to the region of the non-volatile memory by an external device; and provide unrestricted access, by the external device, to the region of the non-volatile memory in response to verification of the forensic key received from the external device.

    MEMORY DEVICE RESILIENT TO CYBER-ATTACKS AND MALFUNCTION
    9.
    发明申请
    MEMORY DEVICE RESILIENT TO CYBER-ATTACKS AND MALFUNCTION 有权

    公开(公告)号：US20210223995A1

    公开(公告)日：2021-07-22

    申请号：US17066599

    申请日：2020-10-09

    申请人： Cypress Semiconductor Corporation

    发明人： Sergey Ostrikov ,  Stephan Rosner ,  Avi Avanindra ,  Hans Van Antwerpen

    IPC分类号： G06F3/06 ,  H04L9/32 ,  G06F21/78 ,  G06F12/10 ,  G06F21/55

    摘要： A non-volatile memory (NVM) integrated circuit device includes an NVM array of memory cells partitioned into a first physical region to store a first firmware stack and a second physical region to store a second firmware stack. The NVM integrated circuit device also includes a processing device that enables a host microcontroller to execute in place the first firmware stack stored within a first set of logical addresses that is mapped to the first physical region. The processing device tracks accesses, by the host microcontroller, to the first set of logical addresses. The processing device, in response to detecting one of a certain number or a certain type of the accesses by the host microcontroller, initiates a recovery operation including to remap the first set of logical addresses to the second physical region.