公开(公告)号：US09779360B2

公开(公告)日：2017-10-03

申请号：US15199532

申请日：2016-06-30

Applicant: D-Wave Systems Inc.

Inventor： Paul Bunyk ,  Felix Maibaum

IPC: G06N99/00 ,  G06F15/82 ,  B82Y10/00 ,  G01R1/067 ,  G06F17/50 ,  H01L39/02 ,  H01L39/22

CPC classification number: G06N99/002 ,  B82Y10/00 ,  G01R1/06755 ,  G06F15/82 ,  G06F17/5009 ,  H01L39/025 ,  H01L39/223

Abstract: A system may include first and second qubits that cross one another and a first coupler having a perimeter that encompasses at least a part of the portions of the first and second qubits, the first coupler being operable to ferromagnetically or anti-ferromagnetically couple the first and the second qubits together. A multi-layered computer chip may include a first plurality N of qubits laid out in a first metal layer, a second plurality M of qubits laid out at least partially in a second metal layer that cross each of the qubits of the first plurality of qubits, and a first plurality N times M of coupling devices that at least partially encompasses an area where a respective pair of the qubits from the first and the second plurality of qubits cross each other.

公开(公告)号：US20160314407A1

公开(公告)日：2016-10-27

申请号：US15199532

申请日：2016-06-30

Applicant: D-Wave Systems Inc.

Inventor： Paul Bunyk ,  Felix Maibaum

IPC: G06N99/00 ,  G06F15/82

CPC classification number: G06N99/002 ,  B82Y10/00 ,  G01R1/06755 ,  G06F15/82 ,  G06F17/5009 ,  H01L39/025 ,  H01L39/223

Abstract: A system may include first and second qubits that cross one another and a first coupler having a perimeter that encompasses at least a part of the portions of the first and second qubits, the first coupler being operable to ferromagnetically or anti-ferromagnetically couple the first and the second qubits together. A multi-layered computer chip may include a first plurality N of qubits laid out in a first metal layer, a second plurality M of qubits laid out at least partially in a second metal layer that cross each of the qubits of the first plurality of qubits, and a first plurality N times M of coupling devices that at least partially encompasses an area where a respective pair of the qubits from the first and the second plurality of qubits cross each other.

公开(公告)号：US20140097405A1

公开(公告)日：2014-04-10

申请号：US14050062

申请日：2013-10-09

Applicant: D-Wave Systems Inc.

Inventor： Paul Bunyk

IPC: H01L49/00

CPC classification number: H01L49/006 ,  B82Y10/00 ,  G06N99/002 ,  H01L31/035209 ,  H01L31/035218 ,  H01L39/22

Abstract: Quantum processor architectures employ unit cells tiled over an area. A unit cell may include first and second sets of qubits where each qubit in the first set crosses at least one qubit in the second set. Each unit cell is positioned proximally adjacent at least one other unit cell. Within each unit cell, at least one qubit is longitudinally shifted with respect to at least one other qubit such that the longitudinally-shifted qubit crosses at least one qubit in a proximally adjacent unit cell. Communicative coupling between qubits is realized through respective intra-cell and inter-cell coupling devices. The longitudinal shifting of qubits and resultant crossing of qubits in proximally adjacent unit cells enables quantum processor architectures that can be better suited to solve certain problems.

Abstract translation: 量子处理器架构采用平铺在一个区域上的单位单元。 单元单元可以包括第一组和第二组量子位，其中第一组中的每个量子位与第二组中的至少一个量子位交叉。 每个单位单元位于邻近至少一个其他单位单元的近侧。 在每个单元单元内，至少一个量子位相对于至少一个其他量子位纵向偏移，使得纵向移位的量子位在近端相邻的单位单元中交叉至少一个量子位。 量子位之间的通信耦合通过相应的小区内和小区间耦合设备来实现。 量子位的纵向移位和邻近的相邻单位单元中量子位的交叉使量子处理器架构更适合于解决某些问题。

公开(公告)号：US20250055457A1

公开(公告)日：2025-02-13

申请号：US18718139

申请日：2022-12-14

Applicant: D-WAVE SYSTEMS INC.

Inventor： Jed D. Whittaker ,  Mark H. Volkmann ,  Andrew J. Berkley ,  Reza Molavi ,  Paul Bunyk ,  Loren J. Swenson

IPC: H03K17/92 ,  H03K5/1252

Abstract: A method of generating a coupling gate between qubits and a superconducting integrated circuit providing a pulse source are discussed. The method includes energizing a power line connected to a pulse source, applying a signal to a control line in communication with a coupler, the coupler in communication between the two qubits, and applying a second signal to a control line in communication with a resonator. The method further includes inducing a tone on a transmission line that selectively communicates with the resonator to bias the resonator, the resonator coupling a signal to the pulse source in combination with the power line, and applying a third signal to a pulse source control line in communication with the pulse source, the pulse source applying a pulse to the coupler in response to the third signal to couple the two qubits for a duration of the coupling gate.

公开(公告)号：US20140329687A1

公开(公告)日：2014-11-06

申请号：US14273200

申请日：2014-05-08

Applicant: D-Wave Systems Inc.

Inventor： Paul Bunyk ,  Richard David Neufeld ,  Felix Maibaum

IPC: G01R1/067

CPC classification number: G06N99/002 ,  B82Y10/00 ,  G01R1/06755 ,  G06F15/82 ,  G06F17/5009 ,  H01L39/025 ,  H01L39/223

Abstract: A system may include first and second qubits that cross one another and a first coupler having a perimeter that encompasses at least a part of the portions of the first and second qubits, the first coupler being operable to ferromagnetically or anti-ferromagnetically couple the first and the second qubits together. A multi-layered computer chip may include a first plurality N of qubits laid out in a first metal layer, a second plurality M of qubits laid out at least partially in a second metal layer that cross each of the qubits of the first plurality of qubits, and a first plurality N times M of coupling devices that at least partially encompasses an area where a respective pair of the qubits from the first and the second plurality of qubits cross each other.

Abstract translation: 系统可以包括彼此交叉的第一和第二量子位和具有包围第一和第二量子位的部分的至少一部分的周边的第一耦合器，第一耦合器可操作以铁磁或反铁磁耦合第一和第二量子位 第二个量子在一起 多层计算机芯片可以包括布置在第一金属层中的第一多个N个量子位，至少部分地布置在第二金属层中的第二多个量子位，该第二金属层跨越第一多个量子位的每个量子位 以及至少部分地包围来自第一和第二多个量子位的相应的一对量子比特彼此交叉的区域的第一多个N倍M个耦合器件。

公开(公告)号：US09406026B2

公开(公告)日：2016-08-02

申请号：US14868019

申请日：2015-09-28

Applicant: D-Wave Systems Inc.

Inventor： Paul Bunyk ,  Felix Maibaum

IPC: H01L39/00 ,  G06N99/00 ,  B82Y10/00 ,  G01R1/067 ,  G06F17/50 ,  H01L39/02 ,  H01L39/22

CPC classification number: G06N99/002 ,  B82Y10/00 ,  G01R1/06755 ,  G06F15/82 ,  G06F17/5009 ,  H01L39/025 ,  H01L39/223

Abstract: A system may include first and second qubits that cross one another and a first coupler having a perimeter that encompasses at least a part of the portions of the first and second qubits, the first coupler being operable to ferromagnetically or anti-ferromagnetically couple the first and the second qubits together. A multi-layered computer chip may include a first plurality N of qubits laid out in a first metal layer, a second plurality M of qubits laid out at least partially in a second metal layer that cross each of the qubits of the first plurality of qubits, and a first plurality N times M of coupling devices that at least partially encompasses an area where a respective pair of the qubits from the first and the second plurality of qubits cross each other.

Abstract translation: 系统可以包括彼此交叉的第一和第二量子位和具有包围第一和第二量子位的部分的至少一部分的周边的第一耦合器，第一耦合器可操作以铁磁或反铁磁耦合第一和第二量子位 第二个量子在一起 多层计算机芯片可以包括布置在第一金属层中的第一多个N个量子位，至少部分地布置在第二金属层中的第二多个量子位，该第二金属层跨越第一多个量子位的每个量子位 以及至少部分地包围来自第一和第二多个量子位的相应的一对量子比特彼此交叉的区域的第一多个N倍M个耦合器件。

公开(公告)号：US09178154B2

公开(公告)日：2015-11-03

申请号：US14050062

申请日：2013-10-09

Applicant: D-Wave Systems Inc.

Inventor： Paul Bunyk

IPC: H01L49/00 ,  H01L39/22 ,  H01L31/0352 ,  G06N99/00 ,  B82Y10/00

CPC classification number: H01L49/006 ,  B82Y10/00 ,  G06N99/002 ,  H01L31/035209 ,  H01L31/035218 ,  H01L39/22

Abstract: Quantum processor architectures employ unit cells tiled over an area. A unit cell may include first and second sets of qubits where each qubit in the first set crosses at least one qubit in the second set. Each unit cell is positioned proximally adjacent at least one other unit cell. Within each unit cell, at least one qubit is longitudinally shifted with respect to at least one other qubit such that the longitudinally-shifted qubit crosses at least one qubit in a proximally adjacent unit cell. Communicative coupling between qubits is realized through respective intra-cell and inter-cell coupling devices. The longitudinal shifting of qubits and resultant crossing of qubits in proximally adjacent unit cells enables quantum processor architectures that can be better suited to solve certain problems.

Abstract translation: 量子处理器架构采用平铺在一个区域上的单位单元。 单元单元可以包括第一组和第二组量子位，其中第一组中的每个量子位与第二组中的至少一个量子位交叉。 每个单位单元位于邻近至少一个其他单位单元的近侧。 在每个单元单元内，至少一个量子位相对于至少一个其他量子位纵向偏移，使得纵向移位的量子位在近端相邻的单位单元中交叉至少一个量子位。 量子位之间的通信耦合通过相应的小区内和小区间耦合设备来实现。 量子位的纵向移位和邻近的相邻单位单元中量子位的交叉使量子处理器架构更适合于解决某些问题。

公开(公告)号：US20160019468A1

公开(公告)日：2016-01-21

申请号：US14868019

申请日：2015-09-28

Applicant: D-Wave Systems Inc.

Inventor： Paul Bunyk ,  Felix Maibaum

IPC: G06N99/00 ,  H01L39/02 ,  H01L39/22 ,  G06F17/50

CPC classification number: G06N99/002 ,  B82Y10/00 ,  G01R1/06755 ,  G06F15/82 ,  G06F17/5009 ,  H01L39/025 ,  H01L39/223

Abstract: A system may include first and second qubits that cross one another and a first coupler having a perimeter that encompasses at least a part of the portions of the first and second qubits, the first coupler being operable to ferromagnetically or anti-ferromagnetically couple the first and the second qubits together. A multi-layered computer chip may include a first plurality N of qubits laid out in a first metal layer, a second plurality M of qubits laid out at least partially in a second metal layer that cross each of the qubits of the first plurality of qubits, and a first plurality N times M of coupling devices that at least partially encompasses an area where a respective pair of the qubits from the first and the second plurality of qubits cross each other.