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公开(公告)号：US20230126467A1
公开(公告)日：2023-04-27
申请号：US17451710
申请日：2021-10-21
Applicant: Dell Products L.P.
Inventor： Umesh Chandra
Abstract: A printed circuit board (PCB), including: a processing unit; a plurality of layers; and a plurality of vias, each via extending through two or more of the layers, wherein a first via of the plurality of vias has a first pad at a first layer of the plurality of layers and a second via of the plurality of vias has a second pad at the first layer of the plurality of layers, wherein the first pad is conjoined with the second pad to form a first heatsink at the first layer that dissipates heat away from the processing unit.
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公开(公告)号：US11585864B2
公开(公告)日：2023-02-21
申请号：US17336659
申请日：2021-06-02
Applicant: Dell Products L.P.
Inventor： Umesh Chandra , Bhyrav Mutnury
IPC: G01R31/58
Abstract: A high-speed signal subsystem testing system tests a processor transmitter and receiver coupled to a connector via a transmitter trace and a receiver trace, respectively. A transmitter test circuit on a testing board coupled to the connector compares a transmitter voltage received from the transmitter via the transmitter trace and the connector to a common mode voltage range and, in response to the transmitter voltage being outside the common mode voltage range, provides a transmitter trace issue signal. A receiver test circuit on the testing board coupled to the connector transmits a first test voltage towards the receiver, compares a second test voltage detected at the receiver test circuit in response to transmitting the first test voltage towards the receiver to a reference test voltage and, in response to the second test voltage being above the reference test voltage, provides a receiver trace issue signal.
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公开(公告)号：US11348439B1
公开(公告)日：2022-05-31
申请号：US17375181
申请日：2021-07-14
Applicant: Dell Products L.P.
Inventor： Umesh Chandra , Bhyrav Mutnury
Abstract: A corrosion monitoring/alerting system includes a chassis. A corrosion monitoring subsystem identifies a current humidity and a current temperature in the chassis, determines that the current humidity is above a corrosion-alert humidity and the current temperature is below a corrosion-alert temperature and, in response, generates a first corrosion alert signal. A corrosion alert subsystem identifies the first corrosion alert signal and, in response, transmits a first recommended corrosion remediation action communication. The corrosion monitoring subsystem may also transmit a test current through a test computing subsystem connection, determine that a test voltage generated in response to transmitting the test current through the test computing subsystem connection is below a corrosion-alert voltage and, response, generate a second corrosion alert signal. The corrosion alert subsystem may identify the second corrosion alert signal and, in response, transmit a second recommended corrosion remediation action communication.
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公开(公告)号：US10897813B2
公开(公告)日：2021-01-19
申请号：US16687408
申请日：2019-11-18
Applicant: Dell Products L.P.
Inventor： Umesh Chandra , Bhyrav M. Mutnury , Chun-Lin Liao
IPC: H05K1/00 , H05K1/02 , H05K1/11 , H05K1/16 , G06F17/00 , G06F17/50 , H04B3/32 , H04B3/50 , H04L25/02 , H05K1/18 , H05K3/10 , H05K3/06
Abstract: A differential trace pair system includes a board having a first, a second, a third, and a fourth board structure member. A differential trace pair in the board includes a first differential trace extending between the first and the third board structure members, and a second differential trace extending between the second and the fourth board structure members. The differential trace pair includes a serpentine region that includes a first portion and a second portion where the first and the second differential traces have a first width, are substantially parallel, and spaced apart by a first differential trace pair spacing, and a third portion in which the second differential trace includes a second width that is greater than the first width, the first and second differential traces are substantially parallel and spaced apart by a second differential trace pair spacing that is greater than the first differential trace pair spacing.
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公开(公告)号：US10698017B2
公开(公告)日：2020-06-30
申请号：US15826840
申请日：2017-11-30
Applicant: DELL PRODUCTS, L.P.
Inventor： Umesh Chandra
IPC: G01R31/28 , H05K1/11 , G01R29/26 , H01R12/72 , H01R12/73 , H01R43/20 , H05K1/02 , H05K1/14 , H05K3/36 , G01R27/26 , H01R12/57 , G01R31/68 , G01R31/69 , H01R43/26
Abstract: A test apparatus includes a host compliance printed circuit board having a first circuit plane and a second circuit plane separated by at least one dielectric layer. A first row of surface mount pads are disposed on the first circuit plane. The first row of surface mount pads includes a first pad and a second pad. A second and third row of surface mount pads are disposed on the first circuit plane. A first and second differential pair of circuit lines is disposed on the first circuit plane. The first differential circuit line has one end coupled to the first pad. The second differential circuit line has one end coupled to the second pad. The first and second differential pair of circuit lines extend from the first and second pads and between the second and third rows of surface mount pads.
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Patent Agency Ranking
公开(公告)号：US20190297721A1
公开(公告)日：2019-09-26
申请号：US16414078
申请日：2019-05-16
Applicant: Dell Products L.P.
Inventor： Umesh Chandra , Bhyrav M. Mutnury
Abstract: A differential trace pair system includes a first conductive layer that is located immediately adjacent a first insulating layer. The system includes a second conductive layer that is located immediately adjacent the first insulating layer and opposite the first insulating layer from the first conductive layer, and includes an aperture that extends through the second conductive layer. A second insulating layer is located immediately adjacent the second conductive layer and opposite the second conductive layer from the first insulating layer. The system includes a first differential trace pair that is included in the second insulating layer and that includes a first differential trace that is positioned adjacent the aperture and references the second conductive layer, and a second differential trace that is longer than the first differential trace and that includes a first portion that is positioned adjacent the second conductive layer aperture and references the first conductive layer.
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公开(公告)号：US09551746B2
公开(公告)日：2017-01-24
申请号：US14644867
申请日：2015-03-11
Applicant: Dell Products L.P.
Inventor： Umesh Chandra , Timothy Thinh Mai
IPC: G01R31/317 , G01R31/3181
CPC classification number: G01R31/31703 , G01R31/31708 , G01R31/31712 , G01R31/31716 , G01R31/3177 , G01R31/31813 , G01R31/31907 , G06F11/2221
Abstract: A backplane testing system includes a test backplane coupled to a test device chassis and including a first connector system, a second connector system, and channels that connect the first connector system and the second connector system. A first test device in a first test device slot on the test device chassis engages the first connector system and provides a loop back circuit for the first connector system. A second test device in a second test device slot on the test device chassis engages the second connector system. The second test device sends a test signal through a channel on the test backplane such that the test signal is provided to the loop back circuit on the first test device and received back through the channel. The second test device analyzes the test signal that is received to determine a testing compliance of the channel on the test backplane.
Abstract translation: 背板测试系统包括耦合到测试设备机箱并包括第一连接器系统，第二连接器系统和连接第一连接器系统和第二连接器系统的通道的测试背板。 测试设备底盘上的第一测试设备插槽中的第一测试设备接合第一连接器系统，并为第一连接器系统提供环回电路。 第二测试设备在测试设备底盘上的第二测试设备插槽中接合第二连接器系统。 第二测试设备通过测试背板上的通道发送测试信号，使得测试信号被提供给第一测试设备上的环回电路并通过通道接收回来。 第二个测试设备分析接收到的测试信号，以确定测试背板上的通道的测试符合性。
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公开(公告)号：US10862232B2
公开(公告)日：2020-12-08
申请号：US16052809
申请日：2018-08-02
Applicant: Dell Products L.P.
Inventor： Umesh Chandra , Bhyrav M. Mutnury
Abstract: A circuit board pad connector system includes a connector that is configured to mount to a connector pad that is included on a circuit board. The connector includes a connector lead frame. A lead portion is provided on the connector lead frame such that the lead portion is oriented substantially perpendicularly relative to the connector pad when the connector is mounted to the connector pad. A first mounting portion is provided on the connector lead frame, is configured to mount the connector to the connector pad, and extends in a first direction that is substantially perpendicular relative to the lead portion. A second mounting portion is provided on the connector lead frame, is configured to mount the connector to the connector pad, and extends in a second direction that is different than the first direction and that is substantially perpendicular relative to the lead portion.
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公开(公告)号：US20200253036A1
公开(公告)日：2020-08-06
申请号：US16264939
申请日：2019-02-01
Applicant: Dell Products L.P.
Inventor： Umesh Chandra , Chun-Lin Liao , Bhyrav M. Mutnury
Abstract: A differential trace pair system includes a board including a board structure having a first, a second, a third, and a fourth board structure member, wherein a distance between the first and the third board structure members is longer than a distance between the second and the fourth board structure members. The differential trace pair system further includes a differential trace pair that includes a first differential trace extending between the first and the third board structure members and a second differential trace extending between the second and the fourth board structure members. The second differential trace having a serpentine structure that includes a first portion that continuously transitions away from the first differential trace and a second portion that is contiguous with the first portion, the second portion continuously transitions towards the first differential trace.
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公开(公告)号：US20200044372A1
公开(公告)日：2020-02-06
申请号：US16052809
申请日：2018-08-02
Applicant: Dell Products L.P.
Inventor： Umesh Chandra , Bhyrav M. Mutnury
Abstract: A circuit board pad connector system includes a connector that is configured to mount to a connector pad that is included on a circuit board. The connector includes a connector lead frame. A lead portion is provided on the connector lead frame such that the lead portion is oriented substantially perpendicularly relative to the connector pad when the connector is mounted to the connector pad. A first mounting portion is provided on the connector lead frame, is configured to mount the connector to the connector pad, and extends in a first direction that is substantially perpendicular relative to the lead portion. A second mounting portion is provided on the connector lead frame, is configured to mount the connector to the connector pad, and extends in a second direction that is different than the first direction and that is substantially perpendicular relative to the lead portion.
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