公开(公告)号：US11489457B2

公开(公告)日：2022-11-01

申请号：US16780267

申请日：2020-02-03

Applicant: DENSO CORPORATION

Inventor： Shingo Tsuchimochi ,  Seita Iwahashi

IPC: H01L23/373 ,  H02M7/537 ,  H01L27/06 ,  H02M7/00 ,  H01L25/07 ,  H01L23/433 ,  H01L23/495 ,  H02M7/493 ,  H01L23/00

Abstract: A semiconductor module may include a plurality of semiconductor elements; and a first power terminal, a second power terminal and a third power terminal electrically connected to the plurality of semiconductor elements. The plurality of semiconductor elements may include at least one upper arm switching element electrically connected between the first power terminal and the second power terminal; and at least one lower arm switching element electrically connected between the second power terminal and the third power terminal. A number of the at least one upper arm switching element may be different from a number of the at least one lower arm switching element.

公开(公告)号：US10777488B2

公开(公告)日：2020-09-15

申请号：US16146340

申请日：2018-09-28

Applicant: DENSO CORPORATION

Inventor： Shingo Tsuchimochi

IPC: H01L23/051 ,  H01L23/31 ,  H01L23/492 ,  H01L23/00 ,  H01L25/07

Abstract: A semiconductor device is provided with a first insulated substrate including an insulator layer and a metal layer disposed on each of two faces of the insulator layer, a first semiconductor element disposed on the metal layer on one face of the first insulated substrate, a second insulated substrate including an insulator layer and a metal layer disposed on each of two faces of the insulator layer, a second semiconductor element disposed on one of the metal layers of the second insulated substrate, and an encapsulant encapsulating the first semiconductor element and the second semiconductor element. The metal layer on the other face of the first insulated substrate and the metal layer on the other face of the second insulated substrate are exposed on a first flat surface of the encapsulant.

公开(公告)号：US11043474B2

公开(公告)日：2021-06-22

申请号：US16396822

申请日：2019-04-29

Applicant: DENSO CORPORATION

Inventor： Shingo Tsuchimochi ,  Rintaro Asai ,  Akinori Sakakibara ,  Masao Noguchi

IPC: H01L25/07 ,  H01L23/498 ,  H01L23/31

Abstract: A semiconductor device may include a first insulated substrate, a first semiconductor chip and a second semiconductor chip disposed on the first insulated substrate, a second insulated substrate opposed to the first insulated substrate with the first semiconductor chip interposed therebetween, and a third insulated substrate opposed to the first insulated substrate with the second semiconductor chip interposed therebetween and located side by side with the second insulated substrate.

公开(公告)号：US12159810B2

公开(公告)日：2024-12-03

申请号：US17746492

申请日：2022-05-17

Applicant: DENSO CORPORATION

Inventor： Akinori Sakakibara ,  Takanori Kawashima ,  Shingo Tsuchimochi ,  Shoichiro Omae

IPC: H01L23/31 ,  H01L23/13 ,  H01L23/373 ,  H01L23/498 ,  H01L25/065 ,  H01L25/07

Abstract: A semiconductor device includes a first insulating circuit board, a semiconductor element on the first insulating circuit board, and an encapsulating body. The first insulating circuit board includes a first insulating substrate, and a first inner conductor layer, and a first outer conductor layer. The first inner conductor layer is electrically connected to a first electrode of the semiconductor element inside of the encapsulating body. The first outer conductor layer is exposed from a surface of the encapsulating body. The first inner conductor layer has a first thin-wall portion a thickness of which reduces toward an outer side, along an outer peripheral edge of the first inner conductor layer with a first width. The first outer conductor layer (i) does not have or (ii) has a second thin-wall portion along the outer peripheral edge of the first outer conductor layer with a second width.

公开(公告)号：US12125823B2

公开(公告)日：2024-10-22

申请号：US17691237

申请日：2022-03-10

Applicant: DENSO CORPORATION

Inventor： Shingo Tsuchimochi

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/367 ,  H01L23/498 ,  H01L27/07

CPC classification number: H01L25/0655 ,  H01L23/3675 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/32 ,  H01L27/0727 ,  H01L2224/32225 ,  H01L2924/1811 ,  H01L2924/1815 ,  H01L2924/182

Abstract: A semiconductor device includes a first insulating substrate and a first semiconductor element joined to the first insulating substrate through the first conductive spacer. The first insulating substrate includes a first insulating layer and a first inner conductive layer disposed at a side of the first insulating layer. The first inner conductive layer includes a surface having a first region and a second region. The second region surrounds the first region and has larger surface roughness than the first region. The first conductive spacer is joined to the first region of the first inner conductive layer through a first junction layer.