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公开(公告)号:US10110217B2
公开(公告)日:2018-10-23
申请号:US15756122
申请日:2016-09-19
申请人: DENSO CORPORATION
发明人: Yasutaka Senda
摘要: A load driving device includes: a first turn-on drive circuit turning on a first power device as one of a plurality of gate-driven power devices; a second turn-on drive circuit turning on a second power device as another one of the plurality of gate-driven power devices different from the first power device; a current detection circuit detecting a current in at least the first power device; and a control circuit controlling the first turn-on drive circuit to turn on the first power device by applying a gate voltage with a first change rate, and subsequently controlling the second turn-on drive circuit to turn on the second power device by applying a gate voltage with a second change rate, which is larger than the first change rate, based on a condition in which the current detection circuit does not detect an overcurrent in the first power device.
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公开(公告)号:US09628067B2
公开(公告)日:2017-04-18
申请号:US14601344
申请日:2015-01-21
申请人: DENSO CORPORATION
发明人: Yasutaka Senda
IPC分类号: H03K3/00 , H03K17/082 , H03K17/60 , H03K17/687
CPC分类号: H03K17/0828 , H03K17/60 , H03K17/6877
摘要: In a gate driver for driving a first transistor with a constant current, a constant current circuit supplies the constant current to a gate of the first transistor. A second transistor has a gate supplied with a gate reference voltage as a reference for a drive voltage to turn ON the first transistor and is connected in a forward direction in a path from the constant current circuit to the gate of the first transistor. A controller drives the first transistor by operating the constant current circuit when an ON instruction is inputted. The controller sets the gate reference voltage to a first value when the ON instruction is inputted and then changes the gate reference voltage to a second value greater than the first value when a predetermined timing comes under a condition where the first transistor is not in an overcurrent state.
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公开(公告)号:US09059709B2
公开(公告)日:2015-06-16
申请号:US14100178
申请日:2013-12-09
申请人: DENSO CORPORATION
发明人: Yasutaka Senda
IPC分类号: H03K17/16 , H03K17/30 , H03K17/082
CPC分类号: H03K17/30 , H03K17/0828
摘要: In a gate drive circuit, a gate voltage limiting circuit limits a gate voltage equal to or lower than a first limiting voltage in a first period, and limits the gate voltage equal to or lower than a second limiting voltage in a second period. A gate voltage generation circuit generates a drive voltage having a first set value, which is determined to operate the transistor in an active region, in the first period, and generates the drive voltage having a second set value, which is determined based on a gate withstand voltage of the transistor and loss in an on operation of the transistor in a saturated region, in the second period. The first limiting voltage is higher than the first set value by a predetermined value. The second limiting voltage is higher than the second set value by a predetermined value.
摘要翻译: 在栅极驱动电路中,栅极电压限制电路在第一期间限制等于或低于第一限制电压的栅极电压,并且在第二周期中将栅极电压限制为等于或低于第二限制电压。 栅极电压产生电路在第一周期中产生具有被确定为在有源区域中操作晶体管的第一设定值的驱动电压,并且产生具有基于栅极确定的第二设定值的驱动电压 在第二周期中,晶体管的耐压和晶体管在饱和区域的导通动作中的损耗。 第一限制电压高于第一设定值预定值。 第二限制电压高于第二设定值预定值。
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公开(公告)号:US10742210B2
公开(公告)日:2020-08-11
申请号:US16592870
申请日:2019-10-04
申请人: DENSO CORPORATION
发明人: Tomotaka Suzuki , Yusuke Shindo , Yasutaka Senda , Ken Toshiyuki
IPC分类号: H03K17/687
摘要: A drive circuit drives switches that are connected to each other in parallel. The drive circuit includes individual discharge paths, a common discharge path, blocking units, a discharge switch, off-holding switches, and a drive control unit. The drive control unit selects, as target switches to be driven to be turned on, at least two switches among the switches. The at least two switches include a first switch and a second switch. The first switch is last to be switched to an off-state among the at least two switches that are selected as the target switches and switched to an on-state. The second switch is other than the first switch among the at least two switches. The off-holding switches includes a first off-holding switch and a second off-holding switch. After switching the second off-holding switch to an on-state, the drive control unit switches the discharge switch to an on-state.
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公开(公告)号:US08922259B2
公开(公告)日:2014-12-30
申请号:US14200367
申请日:2014-03-07
申请人: Denso Corporation
发明人: Kazuki Yamauchi , Yasutaka Senda
CPC分类号: H03K17/08128
摘要: A gate drive circuit includes a power supply circuit that has an output switch function for switching a voltage value of a drive voltage between two levels, a gate-ON drive circuit that outputs a constant electric current toward a gate of an IGBT from an output terminal of the power supply circuit, and a control section performs a constant electric current drive of a gate of the IGBT at a time of a turn-ON by operating the gate-ON drive circuit. At a turn-ON start time, the control section sets the drive voltage to a relatively-high first set value, and then switches the drive voltage to a relatively-low second set value at a switch timing after a mirror period end time.
摘要翻译: 栅极驱动电路包括电源电路,其具有用于切换两级之间的驱动电压的电压值的输出开关功能,从输出端子向IGBT的栅极输出恒定电流的栅极导通驱动电路 并且控制部分通过操作所述栅极导通驱动电路来执行在导通时的IGBT的栅极的恒定电流驱动。 在接通启动时,控制部将驱动电压设定为相对高的第一设定值,然后在镜面周期结束时间之后的切换定时将驱动电压切换为相对低的第二设定值。
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公开(公告)号:US11368147B2
公开(公告)日:2022-06-21
申请号:US17336980
申请日:2021-06-02
申请人: DENSO CORPORATION
发明人: Kazuki Yamauchi , Yasutaka Senda
IPC分类号: H03K17/0812 , H02M1/084
摘要: A gate drive circuit includes one output element, a constant current drive circuit, and a constant voltage drive circuit. The output element outputs a gate drive signal to a gate of a gate driven switching element. The constant current drive circuit causes the output element to output the gate drive signal with a constant current. The constant voltage drive circuit causes the output element to output the gate drive signal with a constant voltage.
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公开(公告)号:US10601416B2
公开(公告)日:2020-03-24
申请号:US16389026
申请日:2019-04-19
申请人: DENSO CORPORATION
发明人: Yasutaka Senda
IPC分类号: H03K3/01 , H03K17/567 , H03K17/687 , H03K17/16 , H02M1/08 , H03K17/12
摘要: A gate drive device for driving a plurality of semiconductor devices connected in parallel to each other includes a constant current circuit, a plurality of switching element, and a drive controller. The constant current circuit supplies a constant current to respective gates of the plurality of semiconductor devices. The plurality of switching elements is respectively provided on a plurality of paths that connects the constant current circuit and the respective gates of the plurality of semiconductor devices. The drive controller controls driving of the plurality of switching elements to supply the constant current from the constant current circuit to the respective gates of the plurality of semiconductor devices.
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公开(公告)号:US09742324B2
公开(公告)日:2017-08-22
申请号:US15016923
申请日:2016-02-05
申请人: DENSO CORPORATION
发明人: Junichi Fukuta , Koichi Nishibata , Hiroya Tsuji , Yusuke Shindo , Shinichiro Nakata , Yasutaka Senda
IPC分类号: H02H7/08 , H02P6/16 , H02P29/028
CPC分类号: H02P6/16 , H02P29/028 , H02P29/032
摘要: In an integrated circuit formed into a single chip, a drive signal generating unit generates drive signals for switching elements of a power conversion circuit. A monitoring unit monitors a microcomputer that calculates generation information that is information used to generate the drive signals, and determines whether or not an abnormality has occurred in the microcomputer. An angle converting unit converts an output signal of an angle sensor to rotation angle information of a rotating electric machine. A drive signal generating unit generates the drive signals for controlling driving of the rotating electric machine based on the generation information and the rotation angle information when the monitoring unit determines that an abnormality has not occurred in the microcomputer, and generates the drive signals based on the rotation angle information, without using the generation information, when the monitoring unit determines that an abnormality has occurred in the microcomputer.
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公开(公告)号:US08970281B2
公开(公告)日:2015-03-03
申请号:US14091473
申请日:2013-11-27
申请人: DENSO CORPORATION
发明人: Teppei Kawamoto , Yasutaka Senda , Ryotaro Miura
CPC分类号: H03K3/012 , H03K17/163 , H03K17/166 , H03K17/168
摘要: A load driver includes a switching element connected to a load, a constant current generator that generates a constant current, and a driver circuit that turns on the switching element for an on-period, which depends on a value of the constant current and is shortened with an increase in the value of the constant current. The constant current generator supplies a first constant current having a first current value to the driver circuit during the on-period, and supplies a second constant current having a second current value smaller than the first current value after the on-period has elapsed and the switching element reaches an on state.
摘要翻译: 负载驱动器包括连接到负载的开关元件,产生恒定电流的恒定电流发生器以及导通开关元件导通开关元件的驱动电路,该导通期间取决于恒定电流的值并被缩短 随着恒流电流的增加。 恒定电流发生器在导通周期期间向驱动器电路提供具有第一电流值的第一恒定电流,并且在经过接通周期之后提供具有小于第一电流值的第二电流值的第二恒定电流,并且 开关元件达到导通状态。
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公开(公告)号:US08878583B2
公开(公告)日:2014-11-04
申请号:US13743515
申请日:2013-01-17
申请人: DENSO CORPORATION
发明人: Yasutaka Senda
CPC分类号: H03K3/017
摘要: A PWM duty cycle converter includes a PWM signal generator, a timing signal generator, a limit signal generator, and a duty cycle limiter. The PWM signal generator generates a first PWM signal by comparing a triangular carrier wave with a duty command from a signal source. The timing signal generator generates a timing signal synchronously with at least one of a maximum value and a minimum value of the amplitude of the carrier wave. The limit signal generator generates a limit signal in response to the timing signal. The limit signal sets at least one of an upper limit and a lower limit on a duty cycle of the first PWM signal. The duty cycle limiter combines the first PWM signal and the limit signal to output a second PWM signal having a limited duty cycle.
摘要翻译: PWM占空比转换器包括PWM信号发生器,定时信号发生器,限位信号发生器和占空比限制器。 PWM信号发生器通过将三角载波与来自信号源的占空指令进行比较来产生第一PWM信号。 定时信号发生器与载波振幅的最大值和最小值中的至少一个同步地产生定时信号。 极限信号发生器响应于定时信号产生限制信号。 极限信号设定第一PWM信号的占空比的上限和下限中的至少一个。 占空比限幅器组合第一PWM信号和极限信号以输出具有有限占空比的第二PWM信号。
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