-
公开(公告)号:US20050093121A1
公开(公告)日:2005-05-05
申请号:US10707865
申请日:2004-01-20
申请人: Da-Jung Chen , Che-Hung Lin , Chin-Hsiung Liao , Cheng-Chieh Hsu
发明人: Da-Jung Chen , Che-Hung Lin , Chin-Hsiung Liao , Cheng-Chieh Hsu
IPC分类号: H01L23/433 , H01L23/495 , H01L23/52
CPC分类号: H01L23/4334 , H01L23/49575 , H01L24/48 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2924/00014 , H01L2924/01078 , H01L2924/09701 , H01L2924/10253 , H01L2924/12042 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: A chip package comprising a substrate, a lead frame, a chip, a set of bonded wires, a heat sink and a packaging material is provided. The substrate has a first metallic layer, a second metallic layer and a conductor. The first metallic layer is formed on a first surface of the substrate and the second metallic layer is formed on a second surface of the substrate. The conductor is formed on a lateral surface of the substrate. The first metallic layer is electrically connected to the second metallic layer through the conductor. The lead frame is attached on the first surface of the substrate and is electrically connected to the first metallic layer. The chip has a back surface attached to the lead frame or the first surface of the substrate. The chip is connected with the lead frame through the bonding wires. The heat sink is attached on the second surface of the substrate and electrically connected with the second metallic layer. The packaging material encapsulates the chip, the bonded wires and the lead frame.
摘要翻译: 提供了包括基板,引线框架,芯片,一组接合线,散热器和封装材料的芯片封装。 基板具有第一金属层,第二金属层和导体。 第一金属层形成在基板的第一表面上,第二金属层形成在基板的第二表面上。 导体形成在基板的侧表面上。 第一金属层通过导体与第二金属层电连接。 引线框架安装在基板的第一表面上并与第一金属层电连接。 芯片具有附接到引线框架或基板的第一表面的后表面。 芯片通过接合线与引线框架连接。 散热器安装在基板的第二表面上并与第二金属层电连接。 封装材料封装芯片,接合线和引线框架。
-
公开(公告)号:US06975513B2
公开(公告)日:2005-12-13
申请号:US10437183
申请日:2003-05-14
申请人: Da-Jung Chen , Chin-Hsiung Liao
发明人: Da-Jung Chen , Chin-Hsiung Liao
IPC分类号: H01L23/373 , H01L23/433 , H01L23/495 , H05K7/20
CPC分类号: H01L23/3735 , H01L23/4334 , H01L23/49575 , H01L24/48 , H01L2224/45099 , H01L2224/48091 , H01L2224/48227 , H01L2924/00014 , H01L2924/181 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要: A high-density power module package wherein the circuits and a part of chips of the power module are formed on respective substrates such that the circuit patterns are not influenced by the chips. Accordingly, the density of the circuit can be improved so as to save the required area of substrate and production cost.
摘要翻译: 一种高密度功率模块封装,其中电路和功率模块的芯片的一部分形成在各个基板上,使得电路图案不受芯片的影响。 因此,可以提高电路的密度,以节省基板所需的面积和生产成本。
-
公开(公告)号:US06775145B1
公开(公告)日:2004-08-10
申请号:US10437238
申请日:2003-05-14
申请人: Da-Jung Chen , Chin-Hsiung Liao
发明人: Da-Jung Chen , Chin-Hsiung Liao
IPC分类号: H05K114
CPC分类号: H01L23/5385 , H01L23/49861 , H01L24/48 , H01L24/49 , H01L25/072 , H01L25/162 , H01L2224/05599 , H01L2224/45099 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/49109 , H01L2224/85399 , H01L2924/00014 , H01L2924/181 , H01L2924/19107 , H01L2224/45015 , H01L2924/207 , H01L2924/00012
摘要: A high density power module package where in the circuits and a part of chips of the power module are formed on respective substrates such that the circuit patterns are not influenced by the chips. Accordingly, the density of the circuit can be improved so as to save the required area of substrate and production cost.
摘要翻译: 一种高密度功率模块封装,其中电路中的一部分芯片和功率模块的一部分形成在各自的基板上,使得电路图案不受芯片的影响。 因此,可以提高电路的密度,以节省基板所需的面积和生产成本。
-
公开(公告)号:US20090085703A1
公开(公告)日:2009-04-02
申请号:US12014590
申请日:2008-01-15
申请人: Chun-Tiao Liu , Yi-Min Huang , Roger Hsieh , Chin-Hsiung Liao
发明人: Chun-Tiao Liu , Yi-Min Huang , Roger Hsieh , Chin-Hsiung Liao
CPC分类号: H01F17/04 , H01F3/10 , H01F17/045 , H01F27/29 , H01F2017/048 , Y10T29/4902
摘要: An inductor comprises a coil, a non-ferrite layer, two electrodes, a first ferrite layer, and a second ferrite layer, where the coil is encapsulated by the non-ferrite layer having a first surface and a second surface opposite to the first surface, two electrodes coupled to the coil are respectively extended out from the non-ferrite layer for connecting a module, and the first ferrite layer and the second ferrite layer are respectively arranged adjacent to the first surface and the second surface of the non-ferrite layer.
摘要翻译: 电感器包括线圈,非铁氧体层,两个电极,第一铁氧体层和第二铁氧体层,其中线圈被具有第一表面的第一表面和与第一表面相对的第二表面的非铁氧体层封装 耦合到线圈的两个电极分别从用于连接模块的非铁氧体层延伸出来,并且第一铁氧体层和第二铁氧体层分别布置成与非铁氧体层的第一表面和第二表面相邻 。
-
公开(公告)号:US07675396B2
公开(公告)日:2010-03-09
申请号:US12014590
申请日:2008-01-15
申请人: Chun-Tiao Liu , Yi-Min Huang , Roger Hsieh , Chin-Hsiung Liao
发明人: Chun-Tiao Liu , Yi-Min Huang , Roger Hsieh , Chin-Hsiung Liao
IPC分类号: H01F5/00
CPC分类号: H01F17/04 , H01F3/10 , H01F17/045 , H01F27/29 , H01F2017/048 , Y10T29/4902
摘要: An inductor comprises a coil, a non-ferrite layer, two electrodes, a first ferrite layer, and a second ferrite layer, where the coil is encapsulated by the non-ferrite layer having a first surface and a second surface opposite to the first surface, two electrodes coupled to the coil are respectively extended out from the non-ferrite layer for connecting a module, and the first ferrite layer and the second ferrite layer are respectively arranged adjacent to the first surface and the second surface of the non-ferrite layer.
摘要翻译: 电感器包括线圈,非铁氧体层,两个电极,第一铁氧体层和第二铁氧体层,其中线圈被具有第一表面的第一表面和与第一表面相对的第二表面的非铁氧体层封装 耦合到线圈的两个电极分别从用于连接模块的非铁氧体层延伸出来,并且第一铁氧体层和第二铁氧体层分别布置成与非铁氧体层的第一表面和第二表面相邻 。
-
-
-
-