公开(公告)号：US06975513B2

公开(公告)日：2005-12-13

申请号：US10437183

申请日：2003-05-14

申请人： Da-Jung Chen ,  Chin-Hsiung Liao

发明人： Da-Jung Chen ,  Chin-Hsiung Liao

IPC分类号： H01L23/373 ,  H01L23/433 ,  H01L23/495 ,  H05K7/20

CPC分类号： H01L23/3735 ,  H01L23/4334 ,  H01L23/49575 ,  H01L24/48 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A high-density power module package wherein the circuits and a part of chips of the power module are formed on respective substrates such that the circuit patterns are not influenced by the chips. Accordingly, the density of the circuit can be improved so as to save the required area of substrate and production cost.

摘要翻译： 一种高密度功率模块封装，其中电路和功率模块的芯片的一部分形成在各个基板上，使得电路图案不受芯片的影响。 因此，可以提高电路的密度，以节省基板所需的面积和生产成本。

公开(公告)号：US20050093121A1

公开(公告)日：2005-05-05

申请号：US10707865

申请日：2004-01-20

申请人： Da-Jung Chen ,  Che-Hung Lin ,  Chin-Hsiung Liao ,  Cheng-Chieh Hsu

发明人： Da-Jung Chen ,  Che-Hung Lin ,  Chin-Hsiung Liao ,  Cheng-Chieh Hsu

IPC分类号： H01L23/433 ,  H01L23/495 ,  H01L23/52

CPC分类号： H01L23/4334 ,  H01L23/49575 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A chip package comprising a substrate, a lead frame, a chip, a set of bonded wires, a heat sink and a packaging material is provided. The substrate has a first metallic layer, a second metallic layer and a conductor. The first metallic layer is formed on a first surface of the substrate and the second metallic layer is formed on a second surface of the substrate. The conductor is formed on a lateral surface of the substrate. The first metallic layer is electrically connected to the second metallic layer through the conductor. The lead frame is attached on the first surface of the substrate and is electrically connected to the first metallic layer. The chip has a back surface attached to the lead frame or the first surface of the substrate. The chip is connected with the lead frame through the bonding wires. The heat sink is attached on the second surface of the substrate and electrically connected with the second metallic layer. The packaging material encapsulates the chip, the bonded wires and the lead frame.

摘要翻译： 提供了包括基板，引线框架，芯片，一组接合线，散热器和封装材料的芯片封装。 基板具有第一金属层，第二金属层和导体。 第一金属层形成在基板的第一表面上，第二金属层形成在基板的第二表面上。 导体形成在基板的侧表面上。 第一金属层通过导体与第二金属层电连接。 引线框架安装在基板的第一表面上并与第一金属层电连接。 芯片具有附接到引线框架或基板的第一表面的后表面。 芯片通过接合线与引线框架连接。 散热器安装在基板的第二表面上并与第二金属层电连接。 封装材料封装芯片，接合线和引线框架。

公开(公告)号：US06775145B1

公开(公告)日：2004-08-10

申请号：US10437238

申请日：2003-05-14

申请人： Da-Jung Chen ,  Chin-Hsiung Liao

发明人： Da-Jung Chen ,  Chin-Hsiung Liao

IPC分类号： H05K114

CPC分类号： H01L23/5385 ,  H01L23/49861 ,  H01L24/48 ,  H01L24/49 ,  H01L25/072 ,  H01L25/162 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49109 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

摘要： A high density power module package where in the circuits and a part of chips of the power module are formed on respective substrates such that the circuit patterns are not influenced by the chips. Accordingly, the density of the circuit can be improved so as to save the required area of substrate and production cost.

摘要翻译： 一种高密度功率模块封装，其中电路中的一部分芯片和功率模块的一部分形成在各自的基板上，使得电路图案不受芯片的影响。 因此，可以提高电路的密度，以节省基板所需的面积和生产成本。

公开(公告)号：US09514964B2

公开(公告)日：2016-12-06

申请号：US14821812

申请日：2015-08-10

申请人： Bau-Ru Lu ,  Da-Jung Chen ,  Yi-Cheng Lin

发明人： Bau-Ru Lu ,  Da-Jung Chen ,  Yi-Cheng Lin

IPC分类号： H01L21/00 ,  H01L21/48 ,  H01L23/495 ,  H01L21/768 ,  H01L25/00 ,  H01L25/16 ,  H01L23/00

CPC分类号： H01L21/4825 ,  H01L21/4821 ,  H01L21/76877 ,  H01L23/49503 ,  H01L23/49524 ,  H01L23/49527 ,  H01L23/49534 ,  H01L23/49558 ,  H01L23/49575 ,  H01L23/49582 ,  H01L24/24 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/215 ,  H01L2224/24011 ,  H01L2224/24247 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/45144 ,  H01L2224/48247 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2924/3011 ,  Y10T29/49123 ,  H01L2924/00012 ,  H01L2924/00

摘要： A method for forming a conductive structure is disclosed, the method comprising the steps of: forming a metallic frame having a plurality of metal parts separated from each other; forming an insulating layer on the top surface of the plurality of metal parts; and forming a conductive pattern layer on the insulating layer for making electrical connections with at least one portion of the plurality of metal parts.

摘要翻译： 公开了一种形成导电结构的方法，所述方法包括以下步骤：形成具有彼此分离的多个金属部件的金属框架; 在所述多个金属部件的顶表面上形成绝缘层; 以及在所述绝缘层上形成导电图案层，用于与所述多个金属部件的至少一部分进行电连接。

公开(公告)号：US09111954B2

公开(公告)日：2015-08-18

申请号：US13180292

申请日：2011-07-11

申请人： Da-Jung Chen ,  Kaipeng Chiang ,  Yu-Chao Fang ,  Yi-Cheng Lin

发明人： Da-Jung Chen ,  Kaipeng Chiang ,  Yu-Chao Fang ,  Yi-Cheng Lin

IPC分类号： H05K7/02 ,  H05K7/06 ,  H05K7/08 ,  H05K7/10 ,  H01L23/64 ,  H01L23/552 ,  H01L25/07 ,  H02M3/155 ,  H02M7/00 ,  H01L23/00

CPC分类号： H01L23/645 ,  H01L23/552 ,  H01L24/16 ,  H01L24/48 ,  H01L25/072 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/1904 ,  H01L2924/19042 ,  H01L2924/19102 ,  H01L2924/19105 ,  H01L2924/3025 ,  H02M3/155 ,  H02M7/003 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A power conversion module includes a circuit carrier board, a semiconductor module and an inductor module. The circuit carrier board has plural bonding pads. The semiconductor module is disposed on a first surface of the circuit carrier board. The inductor module has plural pins. The pins are extended from the inductor module along a first direction and connected with corresponding bonding pads on the circuit carrier board, so that a receptacle is defined between the inductor module and the circuit carrier board for accommodating the semiconductor module.

摘要翻译： 电力转换模块包括电路载板，半导体模块和电感模块。 电路载板具有多个接合焊盘。 半导体模块设置在电路承载板的第一表面上。 电感器模块具有多个引脚。 引脚沿着第一方向从电感器模块延伸并与电路载体板上的对应焊盘连接，使得在电感器模块和电路载体板之间限定容纳半导体模块的插座。

公开(公告)号：US20100059870A1

公开(公告)日：2010-03-11

申请号：US12491096

申请日：2009-06-24

申请人： Chau-Chun Wen ,  Da-Jung Chen ,  Bau-Ru Lu ,  Chun-Hsien Lu

发明人： Chau-Chun Wen ,  Da-Jung Chen ,  Bau-Ru Lu ,  Chun-Hsien Lu

IPC分类号： H01L23/495

CPC分类号： H01L23/4334 ,  H01L23/3735 ,  H01L23/49531 ,  H01L23/49586 ,  H01L23/62 ,  H01L24/48 ,  H01L25/0655 ,  H01L25/072 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/09701 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A chip package structure including a substrate, at least one chip, a plurality of leads, a heat dissipation device, a molding compound, and at least one insulating sheet is provided. The chip is disposed on the substrate. The leads are electrically connected to the substrate. The molding compound having a top surface encapsulates the chip, the substrate, and a portion of the leads. The heat dissipation device is disposed on the top surface of the molding compound. The insulating sheet disposed between the heat dissipation device and at least one of the leads has a bending line dividing the insulating sheet into a main body disposed on the molding compound and a bending portion extending from the main body.

摘要翻译： 提供了包括基板，至少一个芯片，多个引线，散热装置，模塑料和至少一个绝缘片的芯片封装结构。 芯片设置在基板上。 引线电连接到基板。 具有顶表面的模制化合物封装芯片，衬底和引线的一部分。 散热装置设置在模塑料的顶表面上。 布置在散热装置与至少一个引线之间的绝缘片具有将绝缘片划分为设置在模制化合物上的主体和从主体延伸的弯曲部的弯曲线。

公开(公告)号：US20080179722A1

公开(公告)日：2008-07-31

申请号：US11930183

申请日：2007-10-31

申请人： Da-Jung Chen ,  Chung-Shiun Fang ,  Bau-Ru Lu ,  Yi-Cheng Lin ,  Chau-Chun Wen

发明人： Da-Jung Chen ,  Chung-Shiun Fang ,  Bau-Ru Lu ,  Yi-Cheng Lin ,  Chau-Chun Wen

IPC分类号： H01L23/495

CPC分类号： H05K1/141 ,  H01L23/495 ,  H01L23/49555 ,  H01L23/49575 ,  H01L24/48 ,  H01L25/162 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19106 ,  H01L2924/30107 ,  H05K1/0262 ,  H05K3/284 ,  H05K3/3421 ,  H05K2201/10166 ,  H05K2201/10924 ,  H05K2201/10969 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： An electronic package structure including a first carrier, at least one first electronic element, at least one second electronic element, and an encapsulant is provided. The first carrier has a first carrying surface and a second carrying surface opposite to the first carrying surface. The first electronic element is disposed on the first carrying surface and electrically connected to the first carrier. The second electronic element is disposed on the second carrying surface and electrically connected to the first carrier. The encapsulant at least covers the first electronic element, the second electronic element, and a part of the first carrier. The space utilization rate of the first carrier of the electronic package structure is higher.

摘要翻译： 提供了包括第一载体，至少一个第一电子元件，至少一个第二电子元件和密封剂的电子封装结构。 第一载体具有与第一载体表面相对的第一载体表面和第二载体表面。 第一电子元件设置在第一承载表面上并电连接到第一载体。 第二电子元件设置在第二承载表面上并电连接到第一载体。 密封剂至少覆盖第一电子元件，第二电子元件和第一载体的一部分。 电子封装结构的第一载体的空间利用率更高。

公开(公告)号：US20070096293A1

公开(公告)日：2007-05-03

申请号：US11336973

申请日：2006-01-23

申请人： Chau Wen ,  Da-Jung Chen ,  Chun-Liang Lin ,  Chih-Chan Day

发明人： Chau Wen ,  Da-Jung Chen ,  Chun-Liang Lin ,  Chih-Chan Day

IPC分类号： H01L23/12 ,  H01L23/52

CPC分类号： H01L23/3107 ,  H01L23/36 ,  H01L23/4334 ,  H01L23/495 ,  H01L23/552 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L25/072 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/49 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012

摘要： The present invention provides a package device for reducing the electromagnetic/radio frequency interference, which includes a first substrate with a shielding structure on the under surface of the first substrate, and an insulating layer on the shielding structure. The first substrate includes a through hole that is filled with the conductor therein. A plurality of lead-frames located on the bottom surface of the first substrate. A second substrate located above between the two lead-frames. Then, the molding compound encapsulated to cover the above structures to form a package device. Therefore, the shielding path of the package device is constructed of the plurality of lead-frames, the conductor within the first substrate, the shielding structure, and the grounded to discharge the electromagnetic/radio frequency out of the package device, thus, the electromagnetic/radio frequency interference for the package device can be reduced.

摘要翻译： 本发明提供了一种用于减小电磁/射频干扰的封装装置，其包括在第一基板的下表面上具有屏蔽结构的第一基板和屏蔽结构上的绝缘层。 第一基板包括在其中填充有导体的通孔。 位于第一基板的底表面上的多个引线框架。 位于两个引线框之间的第二基板。 然后，封装以覆盖上述结构的模塑料形成包装装置。 因此，封装器件的屏蔽路径由多个引线框架，第一基板内的导体，屏蔽结构构成，并且接地以将电磁/射频放出封装器件，因此，电磁 可以减少封装器件的射频干扰。

公开(公告)号：US09271398B2

公开(公告)日：2016-02-23

申请号：US13481887

申请日：2012-05-28

申请人： Da-Jung Chen ,  Chun-Tiao Liu

发明人： Da-Jung Chen ,  Chun-Tiao Liu

IPC分类号： H05K7/18 ,  H05K1/18 ,  H01L23/64 ,  H01L25/16 ,  H01F27/02 ,  H05K3/34

CPC分类号： H05K1/181 ,  H01F27/027 ,  H01L23/645 ,  H01L25/16 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H05K3/3421 ,  H05K2201/1003 ,  H05K2201/10515 ,  H05K2201/10537 ,  H05K2201/10924 ,  Y02P70/611 ,  Y10T29/4902 ,  H01L2924/00014 ,  H01L2924/00

摘要： A power-supply module includes at least one power-supply component, an inductor and a package. The inductor is disposed over the at least one power-supply components, and the at least a power-supply component and the inductor are disposed within the package. Besides, the power-supply module further comprises a printed circuit board, and the at least one power-supply component and the inductor are mounted to the printed circuit board. Moreover, the inductor comprises a plurality of leads that support the inductor over the at least one power-supply component.

摘要翻译： 电源模块包括至少一个电源组件，电感器和封装。 电感器设置在至少一个电源部件上，并且至少一个电源部件和电感器设置在封装内。 此外，电源模块还包括印刷电路板，并且至少一个电源部件和电感器安装到印刷电路板。 此外，电感器包括多个引线，其在至少一个电源部件上支撑电感器。

公开(公告)号：US09001527B2

公开(公告)日：2015-04-07

申请号：US13485954

申请日：2012-06-01

申请人： Da-Jung Chen ,  Chun-Tiao Liu ,  Bau-Ru Lu

发明人： Da-Jung Chen ,  Chun-Tiao Liu ,  Bau-Ru Lu

IPC分类号： H05K5/02 ,  H05K1/18 ,  H01L23/64 ,  H01L25/16 ,  H01F27/02 ,  H05K3/34 ,  H01L23/24 ,  H01L23/31 ,  H01L23/552

CPC分类号： H05K1/181 ,  H01F27/022 ,  H01F27/027 ,  H01F27/24 ,  H01F27/29 ,  H01F27/40 ,  H01L23/24 ,  H01L23/3121 ,  H01L23/552 ,  H01L23/645 ,  H01L24/73 ,  H01L25/16 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/3025 ,  H05K3/3421 ,  H05K2201/1003 ,  H05K2201/10515 ,  H05K2201/10537 ,  H05K2201/10924 ,  Y02P70/611 ,  Y10T29/49146 ,  H01L2924/00012 ,  H01L2924/00

摘要： The present invention discloses an electronic package structure. The body has a top surface with a cavity thereon, the first conductive element is disposed in the cavity, and the second conductive element is disposed in the body. The first external electrode electrically connected to the first conductive element and the second external electrode electrically connected to the second conductive element are both disposed on the top surface of the body or a first surface formed by the top surface of the encapsulation compound and the exposed portions of the top surface of the body which are not covered by the encapsulation compound.

摘要翻译： 本发明公开了一种电子封装结构。 本体具有其上具有空腔的顶表面，第一导电元件设置在空腔中，并且第二导电元件设置在主体中。 电连接到第一导电元件的第一外部电极和与第二导电元件电连接的第二外部电极都设置在主体的顶表面上或由封装化合物的顶表面形成的第一表面和暴露部分 的未被封装化合物覆盖的身体的顶表面。