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    MOS transistor forming method
    1.
    发明授权
    MOS transistor forming method 有权
    MOS晶体管形成方法

    公开(公告)号：US07416950B2

    公开(公告)日：2008-08-26

    申请号：US11351287

    申请日：2006-02-09

    申请人： Damien Lenoble ,  Fabrice Lallement

    发明人： Damien Lenoble ,  Fabrice Lallement

    IPC分类号： H01L21/336

    CPC分类号： H01L21/265 ,  H01J37/32412 ,  H01L21/2236 ,  H01L21/26513 ,  H01L21/2658 ,  H01L29/1045 ,  H01L29/1083 ,  H01L29/6659

    摘要： A method for forming, in a single-crystal semiconductor substrate of a first conductivity type, doped surface regions of the second conductivity type and deeper doped regions of the first conductivity type underlying the surface regions, including the step of negatively biasing the substrate placed in the vicinity of a plasma including, in the form of cations dopants of the first conductivity type and dopants of a second conductivity type, the dopants of the second conductivity type having an atomic mass which is greater than that of the dopants of the first conductivity type.

    摘要翻译： 一种在第一导电类型的单晶半导体衬底中形成第二导电类型的掺杂表面区域和在表面区域下面的第一导电类型的较深掺杂区域的方法，包括将放置在 包括以第一导电类型的阳离子掺杂剂和第二导电类型的掺杂剂的形式的等离子体的附近，第二导电类型的掺杂剂的原子质量大于第一导电类型的掺杂剂的原子质量 。

    MOS transistor forming method
    2.
    发明申请
    MOS transistor forming method 有权
    MOS晶体管形成方法

    公开(公告)号：US20060177976A1

    公开(公告)日：2006-08-10

    申请号：US11351287

    申请日：2006-02-09

    申请人： Damien Lenoble ,  Fabrice Lallement

    发明人： Damien Lenoble ,  Fabrice Lallement

    IPC分类号： H01L21/8238

    CPC分类号： H01L21/265 ,  H01J37/32412 ,  H01L21/2236 ,  H01L21/26513 ,  H01L21/2658 ,  H01L29/1045 ,  H01L29/1083 ,  H01L29/6659

    摘要： A method for forming, in a single-crystal semiconductor substrate of a first conductivity type, doped surface regions of the second conductivity type and deeper doped regions of the first conductivity type underlying the surface regions, including the step of negatively biasing the substrate placed in the vicinity of a plasma including, in the form of cations dopants of the first conductivity type and dopants of a second conductivity type, the dopants of the second conductivity type having an atomic mass which is greater than that of the dopants of the first conductivity type.

    摘要翻译： 一种在第一导电类型的单晶半导体衬底中形成第二导电类型的掺杂表面区域和在表面区域下面的第一导电类型的较深掺杂区域的方法，包括将放置在 包括以第一导电类型的阳离子掺杂剂和第二导电类型的掺杂剂的形式的等离子体的附近，第二导电类型的掺杂剂的原子质量大于第一导电类型的掺杂剂的原子质量 。

    Process for fabricating a substrate comprising a deposited buried oxide layer
    7.
    发明授权
    Process for fabricating a substrate comprising a deposited buried oxide layer 有权
    用于制造包括沉积的掩埋氧化物层的衬底的工艺

    公开(公告)号：US08343850B2

    公开(公告)日：2013-01-01

    申请号：US12524104

    申请日：2008-02-12

    申请人： Eric Guiot ,  Fabrice Lallement

    发明人： Eric Guiot ,  Fabrice Lallement

    IPC分类号： H01L21/46

    CPC分类号： H01L21/76254

    摘要： A process for fabricating a substrate that includes a buried oxide layer for the production of electronic components or the like. The process includes depositing an oxide layer or a nitride layer on either of a donor or receiver substrate, and bringing the donor and receiver substrates into contact; conducting at least a first heat treatment of the oxide or nitride layer before bonding the substrates, and conducting a second heat treatment of the fabricated substrate of the receiver substrate, the oxide layer and all or part of the donor substrate at a temperature equal to or higher than the temperature applied in the first heat treatment. Substrates that have an oxide or nitride layer deposited thereon wherein the oxide or nitride layer is degassed and has a refractive index smaller than the refractive index of an oxide or nitride layer of the same composition formed by thermal growth.

    摘要翻译： 一种制造基板的方法，该基板包括用于制造电子部件等的掩埋氧化物层。 该方法包括在供体或接收器基底中的任一个上沉积氧化物层或氮化物层，并使供体和接收器基板接触; 在接合衬底之前对氧化物或氮化物层进行至少第一次热处理，并且在等于或等于或等于的温度下对接收衬底，氧化物层和所有或部分施主衬底的制造衬底进行第二次热处理， 高于在第一热处理中施加的温度。 在其上沉积有氧化物或氮化物层的衬底，其中氧化物或氮化物层被脱气并且具有小于通过热生长形成的相同组成的氧化物或氮化物层的折射率的折射率。

    METHOD FOR TRANSFERRING A LAYER OF A SEMICONDUCTOR AND SUBSTRATE COMPRISING A CONFINEMENT STRUCTURE
    9.
    发明申请
    METHOD FOR TRANSFERRING A LAYER OF A SEMICONDUCTOR AND SUBSTRATE COMPRISING A CONFINEMENT STRUCTURE 有权
    用于传输包含结构结构的半导体层和衬底层的方法

    公开(公告)号：US20140183601A1

    公开(公告)日：2014-07-03

    申请号：US14127926

    申请日：2012-06-20

    申请人： Fabrice Lallement ,  Christophe Figuet ,  Daniel Delprat

    发明人： Fabrice Lallement ,  Christophe Figuet ,  Daniel Delprat

    IPC分类号： H01L21/762 ,  H01L29/267

    CPC分类号： H01L21/76254 ,  H01L29/267

    摘要： A method for transferring a layer of semiconductor by providing a donor substrate that includes a useful layer of a semiconductor material, a confinement structure that includes a confinement layer of a semiconductor material having a chemical composition that is different than that of the useful layer, and two protective layers of semiconductor material that is distinct from the confinement layer with the protective layers being arranged on both sides of the confinement layer; introducing ions into the donor substrate, bonding the donor substrate to a receiver substrate, subjecting the donor and receiver substrates to a heat treatment that provides an increase in temperature during which the confinement layer attracts the ions in order to concentrate them in the confinement layer, and detaching the donor substrate from the receiver substrate by breaking the confinement layer.

    摘要翻译： 一种用于通过提供包括半导体材料的有用层的施主衬底转移半导体层的方法，包括具有不同于有用层的化学组成的半导体材料的限制层的约束结构，以及 与限制层不同的半导体材料的两个保护层，其中保护层布置在限制层的两侧; 将供体衬底引入施主衬底中，将施主衬底粘合到接收器衬底上，对供体和接收衬底进行热处理，该处理提供限制层吸引离子的温度升高，以便将它们集中在约束层中， 以及通过破坏所述限制层将所述施主衬底从所述接收器衬底分离。

    PROCESS FOR MANUFACTURING A STRUCTURE COMPRISING A GERMANIUM LAYER ON A SUBSTRATE
    10.
    发明申请
    PROCESS FOR MANUFACTURING A STRUCTURE COMPRISING A GERMANIUM LAYER ON A SUBSTRATE 审中-公开
    在基板上制造包含锗层的结构的方法

    公开(公告)号：US20110183493A1

    公开(公告)日：2011-07-28

    申请号：US12937920

    申请日：2009-06-12

    申请人： Nicolas Daval ,  Oleg Kononchuk ,  Eric Guiot ,  Cecile Aulnette ,  Fabrice Lallement ,  Christophe Figuet ,  Didier Landru

    发明人： Nicolas Daval ,  Oleg Kononchuk ,  Eric Guiot ,  Cecile Aulnette ,  Fabrice Lallement ,  Christophe Figuet ,  Didier Landru

    IPC分类号： H01L21/762

    CPC分类号： H01L21/76254 ,  H01L21/2007 ,  H01L21/76256

    摘要： The present invention relates to a process for manufacturing a structure comprising a germanium layer (3) on a support substrate (1), characterised in that it comprises the following steps: (a) formation of an intermediate structure (10) comprising said support substrate (1), a silicon oxide layer (20) and said germanium layer (3), the silicon oxide layer (20) being in direct contact with the germanium layer (3), (b) application to said intermediate structure (10) of a heat treatment, in a neutral or reducing atmosphere, at a defined temperature and for a defined time, to diffuse at least part of the oxygen from the silicon oxide layer (20) through the germanium layer (3).

    摘要翻译： 本发明涉及一种用于制造包括在支撑衬底（1）上的锗层（3）的结构的方法，其特征在于包括以下步骤：（a）形成包含所述支撑衬底的中间结构（10） （1），氧化硅层（20）和所述锗层（3），氧化硅层（20）与锗层（3）直接接触，（b）施​​加到所述中间结构（10） 在中性或还原性气氛中，在限定的温度下和在一定时间内进行热处理，以使至少部分氧从氧化硅层（20）扩散通过锗层（3）。