公开(公告)号：US07371311B2

公开(公告)日：2008-05-13

申请号：US10682276

申请日：2003-10-08

申请人： Daniel J Zierath ,  Vinay Chikarmane ,  Valery M Dubin

发明人： Daniel J Zierath ,  Vinay Chikarmane ,  Valery M Dubin

IPC分类号： C25D3/38 ,  C25D21/18

CPC分类号： C25D21/12

摘要： An embodiment of the invention provides a method for reducing within die thickness variations by modifying the concentration of components of a low-acid electroplating solution. For one embodiment, the leveler concentration is increased sufficiently to reduce within die thickness variations to a specified value. For one embodiment of the invention, the leveler and suppressor are increased to reduce within die thickness variations and substantially reduce a plurality of electroplating defects. In such an embodiment the combined concentration of leveler and suppressor is determined to maintain adequate gap fill.

摘要翻译： 本发明的一个实施方案提供了一种通过改变低酸性电镀溶液的组分浓度来减小模内厚度变化的方法。 对于一个实施例，调平器浓度被充分增加以将模具厚度变化减小到指定值。 对于本发明的一个实施例，矫直机和抑制器增加以减小模内厚度变化并且基本上减少多个电镀缺陷。 在这样的实施例中，确定矫直机和抑制器的组合浓度以保持足够的间隙填充。

公开(公告)号：US07847394B2

公开(公告)日：2010-12-07

申请号：US11313362

申请日：2005-12-20

申请人： Valery M Dubin ,  Thomas S. Dory

发明人： Valery M Dubin ,  Thomas S. Dory

IPC分类号： H01L23/10 ,  H01L23/34

CPC分类号： H01L23/373 ,  B82Y10/00 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/73253 ,  H01L2924/01037 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/16195 ,  Y10S977/732 ,  Y10S977/744 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49133 ,  Y10T29/49144 ,  Y10T428/30

摘要： According to one aspect of the invention, a method of constructing an electronic assembly is provided. A layer of metal is formed on a backside of a semiconductor wafer having integrated formed thereon. Then, a porous layer is formed on the metal layer. A barrier layer of the porous layer at the bottom of the pores is thinned down. Then, a catalyst is deposited at the bottom of the pores. Carbon nanotubes are then grown in the pores. Another layer of metal is then formed over the porous layer and the carbon nanotubes. The semiconductor wafer is then separated into microelectronic dies. The dies are bonded to a semiconductor substrate, a heat spreader is placed on top of the die, and a semiconductor package resulting from such assembly is sealed. A thermal interface is formed on the top of the heat spreader. Then a heat sink is placed on top of the thermal interface.

摘要翻译： 根据本发明的一个方面，提供一种构造电子组件的方法。 在其上集成形成的半导体晶片的背面上形成金属层。 然后，在金属层上形成多孔层。 在孔的底部的多孔层的阻挡层变薄。 然后，催化剂沉积在孔的底部。 然后在孔中生长碳纳米管。 然后在多孔层和碳纳米管上形成另一层金属。 然后将半导体晶片分离成微电子管芯。 将模具结合到半导体衬底，将散热器放置在管芯的顶部，并且由这种组装产生的半导体封装被密封。 在散热器的顶部形成热界面。 然后将散热器放置在热界面的顶部。