公开(公告)号：US07238985B2

公开(公告)日：2007-07-03

申请号：US10911170

申请日：2004-08-04

申请人： David Paul Jones ,  Robert P. Haase

发明人： David Paul Jones ,  Robert P. Haase

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/00 ,  H01L31/117

CPC分类号： H01L29/66431 ,  H01L29/1054 ,  H01L29/165 ,  H01L29/41766 ,  H01L29/66666 ,  H01L29/7781 ,  H01L29/7788 ,  H01L29/7789 ,  H01L29/7827

摘要： A MOSgated trench device has a reduced on resistance by forming a less than about a 13 nm thick strained SiGe layer on the silicon surface of the trenches and forming a thin (30 nm or less) layer of epitaxially deposited silicon on the SiGe layer which epi layer is converted to a gate oxide layer. The conduction channel formed by the SiGe layer is permanently strained to increase its mobility particularly hole mobility.

摘要翻译： MOS沟槽器件通过在沟槽的硅表面上形成小于约13nm厚的应变SiGe层，并且在SiGe层上形成薄（30nm或更小）的外延沉积硅的薄层，其外延 层被转换成栅极氧化物层。 由SiGe层形成的导电通道永久地应变以增加其迁移率，特别是空穴迁移率。

公开(公告)号：US07691708B2

公开(公告)日：2010-04-06

申请号：US11804184

申请日：2007-05-17

申请人： David Paul Jones ,  Robert P. Haase

发明人： David Paul Jones ,  Robert P. Haase

IPC分类号： H01L21/336

CPC分类号： H01L29/66431 ,  H01L29/1054 ,  H01L29/165 ,  H01L29/41766 ,  H01L29/66666 ,  H01L29/7781 ,  H01L29/7788 ,  H01L29/7789 ,  H01L29/7827

摘要： A MOSgated trench device has a reduced on resistance by forming a less than about a 13 nm thick strained SiGe layer on the silicon surface of the trenches and forming a thin (30 nm or less) layer of epitaxially deposited silicon on the SiGe layer which epi layer is converted to a gate oxide layer. The conduction channel formed by the SiGe layer is permanently strained to increase its mobility particularly hole mobility.

摘要翻译： MOS沟槽器件通过在沟槽的硅表面上形成小于约13nm厚的应变SiGe层，并且在SiGe层上形成薄（30nm或更小）的外延沉积硅的薄层，其外延 层被转换成栅极氧化物层。 由SiGe层形成的导电通道永久地应变以增加其迁移率，特别是空穴迁移率。

公开(公告)号：US06974750B2

公开(公告)日：2005-12-13

申请号：US10786871

申请日：2004-02-24

申请人： Robert P. Haase

发明人： Robert P. Haase

IPC分类号： H01L21/265 ,  H01L21/324 ,  H01L21/336 ,  H01L29/417 ,  H01L29/78

CPC分类号： H01L29/7813 ,  H01L21/26513 ,  H01L21/324 ,  H01L29/41766 ,  H01L29/7802

摘要： A process for fabricating power semiconductor devices involving preparation of a silicon wafer by epitaxial formation of an intrinsic silicon layer on a silicon substrate and high energy implantation to form channel and drift regions in the intrinsic epitaxial silicon.

摘要翻译： 一种用于制造功率半导体器件的方法，包括通过在硅衬底上外延形成本征硅层和高能量注入来制备硅晶片，以在本征外延硅中形成沟道和漂移区。

公开(公告)号：US5087582A

公开(公告)日：1992-02-11

申请号：US396844

申请日：1989-08-21

申请人： Richard N. Campbell ,  Michael K. Thompson ,  Robert P. Haase

发明人： Richard N. Campbell ,  Michael K. Thompson ,  Robert P. Haase

IPC分类号： H01L27/092 ,  H01L21/336 ,  H01L21/8238 ,  H01L29/78

CPC分类号： H01L29/6659 ,  H01L21/823864 ,  H01L29/78

摘要： A method of fabricating a MOSFET wherein sidewall spacers are provided adjacent the gate of the MOSFET, the method including the steps of providing an insulating layer which extends over the source, drain and gate of the MOSFET and which acts as an impurity diffusion barrier; and forming on the insulating layer sidewall spacers which are composed of an insulating material.