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    Multi-substrate radio-frequency circuit
    1.
    发明授权
    Multi-substrate radio-frequency circuit 失效
    多基板射频电路

    公开(公告)号：US6002375A

    公开(公告)日：1999-12-14

    申请号：US922057

    申请日：1997-09-02

    申请人： David Warren Corman ,  Richard Scott Torkington ,  Stephen Chih-Hung Ma ,  Dean Lawrence Cook ,  Kenneth Brice-Heames

    发明人： David Warren Corman ,  Richard Scott Torkington ,  Stephen Chih-Hung Ma ,  Dean Lawrence Cook ,  Kenneth Brice-Heames

    IPC分类号： H01Q1/38 ,  H04B1/38

    CPC分类号： H01Q1/38

    摘要： A radio-frequency circuit (20) includes a hybrid integrated circuit (24) having a passive circuit element (38) and a d-c biasing circuit element (54) embedded within a first substrate (32) of a low cost and rugged first semiconducting material, and first and second active circuit elements (36, 40) embedded within second and third substrates (44, 46), respectively, of a second semiconductor material having the characterisitics of greater frangibility but higher gain than the first semiconductor material. The first and second activ circuit elements (36, 40) are substantially first and second single components (36, 40), and are each electrically coupled to the passive circuit element (38). The d-c biasing circuit element (54) is electrically coupled to the first and second active circuit elements (36, 40). The second and third substrates (44, 46) are physically coupled to the first substrate (32), which is thicker than either the second or third substrate (44, 46).

    摘要翻译： 射频电路（20）包括混合集成电路（24），该混合集成电路（24）具有嵌入低成本和坚固的第一半导体材料的第一衬底（32）内的无源电路元件（38）和直流偏置电路元件（54） 以及分别嵌入第二半导体材料的第二和第三衬底（44,46）中的第一和第二有源电路元件（36,40），其具有比第一半导体材料更大的易碎性，但具有更高增益的特征。 第一和第二激活电路元件（36,40）基本上是第一和第二单个部件（36,40），并且各自电耦合到无源电路元件（38）。 d-c偏置电路元件（54）电耦合到第一和第二有源电路元件（36,40）。 第二和第三基板（44,46）物理耦合到比第二或第三基板（44,46）更厚的第一基板（32）。

    Method for forming a semiconductor chip carrier
    2.
    发明授权
    Method for forming a semiconductor chip carrier 失效
    半导体芯片载体的形成方法

    公开(公告)号：US5401689A

    公开(公告)日：1995-03-28

    申请号：US210486

    申请日：1994-04-22

    申请人： John K. Frei ,  Kenneth Brice-Heames

    发明人： John K. Frei ,  Kenneth Brice-Heames

    IPC分类号： H01L23/498 ,  H05K1/14 ,  H05K3/34 ,  H05K3/36 ,  H05K3/40 ,  H01L21/60

    CPC分类号： H05K1/141 ,  H01L23/49827 ,  H05K3/4076 ,  H01L2224/16 ,  H01L2924/01014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H05K2201/049 ,  H05K2201/09827 ,  H05K2201/09845 ,  H05K2201/10674 ,  H05K2203/063 ,  H05K3/3436 ,  H05K3/368 ,  Y10T29/49126 ,  Y10T29/49144

    摘要： A carrier allows a semiconductor die to be flip-chip mounted to a printed wiring board. Many carriers are formed together in an array. A bottom pad constellation formed on one side of a carrier is compatible with the printed wiring board's layout rules. This pad constellation couples to a top pad constellation on the opposing side of the carrier through stepped vias. Conductive bumps made from an alloy of gold and a metal from the platinum family are formed on bond-pads of the die. The top pad constellation of the carrier is formed primarily from gold. The carrier's bottom pad constellation is formed from the gold/platinum alloy. Carriers and dice may be tested by probing the carrier's pad bottom constellation. After testing, solder bumps are formed on the bottom pad constellation, and the carrier is soldered to the printed wiring board.

    摘要翻译： 载体允许将半导体管芯倒装芯片安装到印刷线路板上。 许多载体一起形成阵列。 形成在载体一侧的底垫星座与印刷线路板的布局规则兼容。 该垫星座通过阶梯式通孔耦合到载体的相对侧上的顶垫星座。 由金族和来自铂族的金属的合金制成的导电凸块形成在管芯的焊盘上。 载体的顶垫星座主要由金形成。 载体的底垫星座由金/铂合金形成。 载体和骰子可以通过探测载体的底部底座进行测试。 在测试之后，在底部焊盘星座上形成焊料凸块，并将载体焊接到印刷线路板上。