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    Integrated circuit employing inverse transistors
    2.
    发明授权
    Integrated circuit employing inverse transistors 失效
    采用反相晶体管的集成电路

    公开(公告)号：US5317208A

    公开(公告)日：1994-05-31

    申请号：US881595

    申请日：1992-05-12

    申请人： Dennis C. Banker ,  Tore A. Carlson ,  Jack A. Dorler ,  Paul D. Hendricks ,  Walter S. Klara ,  Frank M. Masci ,  James R. Struk

    发明人： Dennis C. Banker ,  Tore A. Carlson ,  Jack A. Dorler ,  Paul D. Hendricks ,  Walter S. Klara ,  Frank M. Masci ,  James R. Struk

    IPC分类号： G05F3/26 ,  H01L27/082 ,  H03K19/086 ,  H03K19/013

    CPC分类号： H01L27/0828 ,  G05F3/265 ,  H03K19/086

    摘要： Relatively constant current sources and current mirrors are formed with vertical bipolar transistors operated in the inverse mode. In one embodiment of the invention, an integrated circuit current mirror includes a dual collector vertical NPN bipolar transistor having first and second regions of one conductivity type defining first and second collector regions, respectively, formed within a common third region of opposite conductivity type defining the base of the transistor. The third region is formed within a fourth region defining the emitter of the transistor. The structure of the dual collector vertical transistor is very compact since the two collectors share the same base region which is embedded in a common emitter (inverse collector) pocket. The "inverse" mode vertical transistor can function as a relatively constant current source with a voltage drop (VCEi) across its collector-to-emitter which is substantially less than that of a bipolar transistor operated in a normal mode. Transistors embodying the invention may be used to provide relatively constant current sources to numerous utilization means, such as logic or analog circuits. Due to the low VCEi of the "inverse" mode transistor, the resultant circuits can be operated at a lower operating voltage than prior art circuits. This results in a decrease of power dissipation.

    摘要翻译： 相对恒定的电流源和电流镜由以反向模式工作的垂直双极晶体管形成。 在本发明的一个实施例中，集成电路电流镜包括双集电极垂直NPN双极晶体管，其具有分别形成在相反导电类型的公共第三区域内的一种导电类型的第一和第二区域，限定第一和第二集电极区域， 晶体管的基极。 第三区域形成在限定晶体管的发射极的第四区域内。 双集电极垂直晶体管的结构非常紧凑，因为两个集电极共享相同的基极区域，该基极区域嵌入共同的发射极（反向集电极）口袋中。 “逆”模式垂直晶体管可以用作相对恒定的电流源，其电压降（VCEi）跨越其集电极到发射极，其基本上小于在正常模式下工作的双极晶体管的电压降。 体现本发明的晶体管可以用于向诸如逻辑或模拟电路的许多使用装置提供相对恒定的电流源。 由于“反”型晶体管的低VCEi，所得到的电路可以在比现有技术电路低的工作电压下工作。 这导致功耗的降低。

    NOR.sub.i circuit/bias generator combination compatible with CSEF circuits
    3.
    发明授权
    NOR.sub.i circuit/bias generator combination compatible with CSEF circuits 失效
    NORI电路/偏置发生器组合兼容CSEF电路

    公开(公告)号：US5241223A

    公开(公告)日：1993-08-31

    申请号：US881592

    申请日：1992-05-12

    申请人： Dennis C. Banker ,  Jack A. Dorler ,  Paul D. Hendricks ,  Frank M. Masci ,  Stephen J. Tytran

    发明人： Dennis C. Banker ,  Jack A. Dorler ,  Paul D. Hendricks ,  Frank M. Masci ,  Stephen J. Tytran

    IPC分类号： H03K19/003 ,  H03K19/086

    CPC分类号： H03K19/00376 ,  H03K19/086

    摘要： NOR logic performed by a half current switch emitter follower ("HCSEF") circuit utilizing a transistor operated in the inverse active mode as its current source and having logic levels compatible with those of current switch emitter follower ("CSEF") circuitry is combined with a novel reference bias generator that controls the logic low voltage level by controlling the voltage drop across the current source. The NOR.sub.i circuit utilizes less power than CSEF circuits, has a natural threshold equal to the threshold of CSEF circuits to which it is coupled, has a delay skew of approximately 1:1, and maintains minimum signal levels with respect to variations on V.sub.cc. The reference bias generator compensates for temperature, process variables and variations in the NOR.sub.i circuit and in the power supply.

    摘要翻译： 利用以反向有功模式操作的晶体管作为其电流源并具有与电流开关射极跟随器（“CSEF”）电路的逻辑电平兼容的逻辑电平的由半电流开关射极跟随器（“HCSEF”）电路执行的NOR逻辑与 一种新颖的参考偏置发生器，通过控制电流源上的电压降来控制逻辑低电压电平。 NORi电路使用比CSEF电路更少的功率，具有等于其耦合到的CSEF电路的阈值的自然阈值，具有约1：1的延迟偏差，并且相对于Vcc上的变化保持最小信号电平。 参考偏置发生器补偿NORi电路和电源中的温度，过程变量和变化。