公开(公告)号：US20070098112A1

公开(公告)日：2007-05-03

申请号：US11264303

申请日：2005-10-31

申请人： Gyudong Kim ,  Won Choe ,  Deog-Kyoon Jeong ,  Jaeha Kim ,  Bong-Joon Lee ,  Min-Kyu Kim

发明人： Gyudong Kim ,  Won Choe ,  Deog-Kyoon Jeong ,  Jaeha Kim ,  Bong-Joon Lee ,  Min-Kyu Kim

IPC分类号： H04L27/04 ,  H04B3/00

CPC分类号： H04L7/0008 ,  H04L25/0272 ,  H04L25/0284 ,  H04L25/4902

摘要： A battery powered computing device has a channel configured as a single direct current balanced differential channel. A signal transmitter is connected to the channel. The signal transmitter is configured to apply clock edge modulated signals to the channel, where the clock edge modulated signals include direct current balancing control signals. A signal receiver is connected to the channel. The signal receiver is configured to recover the direct current balancing control signals.

摘要翻译： 电池供电的计算设备具有被配置为单个直流平衡差分通道的通道。 信号发射器连接到通道。 信号发射器被配置为将时钟边缘调制信号施加到信道，其中时钟边缘调制信号包括直流平衡控制信号。 信号接收器连接到通道。 信号接收器被配置为恢复直流平衡控制信号。

公开(公告)号：US6157360A

公开(公告)日：2000-12-05

申请号：US815486

申请日：1997-03-11

申请人： Deog-Kyoon Jeong ,  Gyudong Kim ,  Ho Young Song ,  David D. Lee

发明人： Deog-Kyoon Jeong ,  Gyudong Kim ,  Ho Young Song ,  David D. Lee

IPC分类号： G02F1/133 ,  G09G3/20 ,  G09G3/36

CPC分类号： G09G3/2011 ,  G09G3/3688 ,  G09G2310/027 ,  G09G3/3696

摘要： Described is a system and method for driving columns of an active matrix display using a resistor-string digital-to-analog converter (DAC). The description includes an auto-stop buffer circuit that drives an analog data voltage in two steps--the first step being active buffering by a "dead-zone amplifier" before the output reaches a certain level and the second step being acting as a passive conduit after the output reaches the certain level. The dead-zone amplifier inherently turns itself off when the analog voltage reaches the certain level. Also described are various column driver architectures in which buffers are placed in various ways in a column driver in between the resistor-string DAC and the column decoders in order to minimize the number of required buffers.

摘要翻译： 描述了一种使用电阻串数模转换器（DAC）驱动有源矩阵显示器列的系统和方法。 该描述包括以两步驱动模拟数据电压的自动停止缓冲电路 - 第一步是在输出达到一定水平之前由“死区放大器”进行主动缓冲，第二步用作无源导管 输出达到一定水平后。 当模拟电压达到一定水平时，死区放大器本身就会自动关闭。 还描述了各种列驱动器架构，其中缓冲器以各种方式放置在电阻器串DAC和列解码器之间的列驱动器中，以便使所需缓冲器的数量最小化。

公开(公告)号：US06560290B2

公开(公告)日：2003-05-06

申请号：US09234619

申请日：1999-01-20

申请人： Gijung Ahn ,  Deog-Kyoon Jeong ,  Gyudong Kim

发明人： Gijung Ahn ,  Deog-Kyoon Jeong ,  Gyudong Kim

IPC分类号： H04L2700

CPC分类号： H04L25/028 ,  H04L25/0272 ,  H04L25/0292

摘要： New very high-speed CMOS techniques are used to achieve a CMOS driver operating at gigabaud speeds. Such a driver may be manufactured more easily than drivers that use GaAs or bipolar techniques and further may be easily integrated with other CMOS circuits. A communication system utilizing the gigabaud CMOS driver may additionally include a receiver with on-chip termination to significantly reduce distortion in the presence of parasitic capacitance in inductance in comparison to a receiver with external termination. Furthermore, the communication system may include a phase tracker and a frame aligner. The phase tracker continously monitors the most frequent transition edges in the oversampled data so that the phase of the receiver clock keeps track of the sender clock. The frame aligner comprises a comma detector which enables instant synchronization of data words with a single comma character within a serial data stream.

摘要翻译： 使用新的非常高速的CMOS技术来实现以千兆位速度运行的CMOS驱动器。 这样的驱动器可以比使用GaAs或双极技术的驱动器更容易制造，并且还可以容易地与其他CMOS电路集成。 与具有外部端接的接收机相比，使用千兆位CMOS驱动器的通信系统可以另外包括具有片上终止的接收器，以在存在电感中的寄生电容的情况下显着减少失真。 此外，通信系统可以包括相位跟踪器和帧对准器。 相位跟踪器连续监视过采样数据中最频繁的转换边沿，使得接收机时钟的相位跟踪发送器时钟。 帧对准器包括逗号检测器，该逗号检测器使串行数据流中具有单个逗号字符的数据字能够即时同步。

公开(公告)号：US06600771B1

公开(公告)日：2003-07-29

申请号：US09234777

申请日：1999-01-20

申请人： Yongsam Moon ,  Deog-Kyoon Jeong ,  Gyudong Kim

发明人： Yongsam Moon ,  Deog-Kyoon Jeong ,  Gyudong Kim

IPC分类号： H04B169

CPC分类号： H04B1/707 ,  G06F1/04 ,  H04B15/00 ,  H04B15/04 ,  H04B2215/064

摘要： A new spread spectrum phase modulation (SSPM) technique is applicable to both data and clock signals. The SSPM technique is more suitable to board level designs than the direct-sequence spread spectrum (DSSS) technique. In addition, SSPM may be combined with controlled edge rate signaling to outperform DSSS.

摘要翻译： 新的扩频相位调制（SSPM）技术适用于数据和时钟信号。 SSPM技术比直接序列扩频（DSSS）技术更适合板级设计。 此外，SSPM可以与受控边缘速率信令组合以优于DSSS。

公开(公告)号：US06271816B1

公开(公告)日：2001-08-07

申请号：US09148583

申请日：1998-09-04

申请人： Deog-Kyoon Jeong ,  Gyudong Kim

发明人： Deog-Kyoon Jeong ,  Gyudong Kim

IPC分类号： G09G336

CPC分类号： G09G3/3655 ,  G09G3/3614 ,  G09G3/3648 ,  G09G3/3688 ,  G09G2310/0248 ,  G09G2330/021 ,  G09G2330/023

摘要： Switches and capacitors are efficiently used to passively change the voltage level on column electrodes without active driving by the column driver circuit. This significantly reduces the power needed by the column driver circuit to drive voltages of alternating polarity onto the column electrodes. In this way, significant power is saved in both the pixel inversion and the row inversion schemes. The average power savings of various of the embodiments exceeds 50% compared with a simple conventional implementation of a column driver circuit. Another aspect similarly reduces the power used by the column driver circuit in the back plane switching scheme.

摘要翻译： 开关和电容器被有效地用于被动地改变列电极上的电压电平，而无需由列驱动电路进行有源驱动。 这显着地降低了列驱动电路所需的功率，以驱动交替极性的电压到列电极上。 以这种方式，在像素反转和行反转方案中节省了显着的功率。 与列驱动电路的简单常规实施方式相比，各种实施例的平均功率节省超过了50％。 另一方面类似地减少了在背面切换方案中列驱动电路所使用的功率。

公开(公告)号：US07627044B2

公开(公告)日：2009-12-01

申请号：US11264303

申请日：2005-10-31

申请人： Gyudong Kim ,  Won Jun Choe ,  Deog-Kyoon Jeong ,  Jaeha Kim ,  Bong-Joon Lee ,  Min-Kyu Kim

发明人： Gyudong Kim ,  Won Jun Choe ,  Deog-Kyoon Jeong ,  Jaeha Kim ,  Bong-Joon Lee ,  Min-Kyu Kim

IPC分类号： H04B3/00

CPC分类号： H04L7/0008 ,  H04L25/0272 ,  H04L25/0284 ,  H04L25/4902

摘要： A battery powered computing device has a channel configured as a single direct current balanced differential channel. A signal transmitter is connected to the channel. The signal transmitter is configured to apply clock edge modulated signals to the channel, where the clock edge modulated signals include direct current balancing control signals. A signal receiver is connected to the channel. The signal receiver is configured to recover the direct current balancing control signals.

摘要翻译： 电池供电的计算设备具有被配置为单个直流平衡差分通道的通道。 信号发射器连接到通道。 信号发射器被配置为将时钟边缘调制信号施加到信道，其中时钟边缘调制信号包括直流平衡控制信号。 信号接收器连接到通道。 信号接收器被配置为恢复直流平衡控制信号。

公开(公告)号：US6144242A

公开(公告)日：2000-11-07

申请号：US148815

申请日：1998-09-04

申请人： Deog-Kyoon Jeong ,  Gyudong Kim ,  David D. Lee

发明人： Deog-Kyoon Jeong ,  Gyudong Kim ,  David D. Lee

IPC分类号： H04B3/04 ,  H04L25/08 ,  H03H11/26

CPC分类号： H04L25/085

摘要： Multiple controllable delays reduce EMI radiated during the transmission of multiple synchronized signals. Each controllable delay introduces a controlled delay into a corresponding signal being transmitted. The controlled delay is such that the combined strength of the multiple signals at peak frequencies is substantially reduced. This results in reduced EMI radiation at those peak frequencies.

摘要翻译： 多个可控延迟降低了传输多个同步信号期间的EMI辐射。 每个可控延迟将受控的延迟引入正在传输的相应信号。 受控的延迟使得峰值频率处的多个信号的组合强度显着降低。 这导致在那些峰值频率下降低了EMI辐射。

公开(公告)号：US08289314B2

公开(公告)日：2012-10-16

申请号：US12569186

申请日：2009-09-29

申请人： Weon-Jun Choe ,  Ah-Reum Kim ,  Kyo-Jin Choo ,  Deog-Kyoon Jeong ,  Do-Hwan Oh ,  Hee-Soo Song

发明人： Weon-Jun Choe ,  Ah-Reum Kim ,  Kyo-Jin Choo ,  Deog-Kyoon Jeong ,  Do-Hwan Oh ,  Hee-Soo Song

IPC分类号： G06F3/038 ,  G11B7/00

CPC分类号： G09G3/20 ,  G09G3/3648 ,  G09G2310/08 ,  G09G2370/08 ,  H03K7/04

摘要： A method of modulating and demodulating a signal includes modulating data information included in an input data signal provided from an external source and clock information included in an input clock signal provided from the external source into a transmission signal, using (n+1) delay clock signals generated based on the input clock signal, where n is a natural number. The transmission signal is demodulated into an output clock signal including restored clock information and an output data signal including restored data information, using (m+1) delay clock signals generated based on the clock information, where m is a natural number less than n.

摘要翻译： 调制和解调信号的方法包括：使用（n + 1）个延迟时钟将从外部源提供的输入数据信号中包括的数据信息和从外部源提供的输入时钟信号中包括的时钟信息调制成发送信号 基于输入时钟信号生成的信号，其中n是自然数。 使用基于时钟信息生成的（m + 1）个延迟时钟信号，将发送信号解调为包括恢复的时钟信息的输出时钟信号和包括恢复的数据信息的输出数据信号，其中m是小于n的自然数。

公开(公告)号：US20120206176A1

公开(公告)日：2012-08-16

申请号：US13398245

申请日：2012-02-16

申请人： Moon-Sang Hwang ,  Won-Jun Choe ,  Han-Kyu Chi ,  Deog-Kyoon Jeong

发明人： Moon-Sang Hwang ,  Won-Jun Choe ,  Han-Kyu Chi ,  Deog-Kyoon Jeong

IPC分类号： H03L7/08

CPC分类号： H03L7/0812 ,  H03L7/095 ,  H03L7/101

摘要： A coarse lock detector is disclosed. The course lock detector uses an initial lock range to determine course lock, and once course lock is achieved, uses a modified lock range to determine course lock.

摘要翻译： 公开了一种粗锁检测器。 课程锁定检测器使用初始锁定范围来确定课程锁定，并且一旦达到课程锁定，则使用修改的锁定范围来确定课程锁定。

公开(公告)号：US20090219739A1

公开(公告)日：2009-09-03

申请号：US12223552

申请日：2006-09-15

申请人： Young-Deok Kim ,  Deog-Kyoon Jeong

发明人： Young-Deok Kim ,  Deog-Kyoon Jeong

IPC分类号： G11C15/04 ,  G11C15/00

CPC分类号： G11C15/04

摘要： A range-matching cell (RMC) includes bit lines (BL); a word line (WL); a match line (ML); search lines (SL); a memory cell (100); a first comparator (110) connected to the memory cell; a second comparator (120) connected to the first comparator, a ground voltage and a predetermined voltage. The comparators conduct a comparing operation in responsive to operator data. Instead of the conventional TCAMs employing 0, 1, and X (don't care) bit, a CAM utilizing the RMC can conduct a comparing operation with less memory by storing the operator data 0 and 1 in advance. Accordingly, memory-use efficiency can be increased.

摘要翻译： 范围匹配单元（RMC）包括位线（BL）; 字线（WL）; 匹配线（ML）; 搜索行（SL）; 存储单元（100）; 连接到所述存储单元的第一比较器（110） 连接到第一比较器的第二比较器（120），接地电压和预定电压。 比较器根据操作员数据进行比较操作。 代替采用0，1和X（无关）位的常规TCAM，使用RMC的CAM可以通过预先存储操作数据0和1来进行具有较少存储器的比较操作。 因此，可以提高记忆使用效率。