Ternary content addressable memory (TCAM) cells with low signal line numbers
    1.
    发明授权
    Ternary content addressable memory (TCAM) cells with low signal line numbers 有权
    具有低信号行号的三元内容可寻址存储器(TCAM)单元

    公开(公告)号:US08018751B1

    公开(公告)日:2011-09-13

    申请号:US12504523

    申请日:2009-07-16

    IPC分类号: G11C15/00

    CPC分类号: G11C15/04

    摘要: A ternary content addressable memory (TCAM) cell circuit formed in a TCAM memory cell array having cells arranged in rows and columns can include a first storage circuit with first and second data path, a second storage circuit with a third and fourth data path, and a compare circuit. No more than four conductive lines in a column wise direction have a direct electrical connection to the TCAM cell. Such conductive lines can include a first bit line coupled to the first data path and the third data path and a second bit line coupled to the second data path and the fourth data path.

    摘要翻译: 形成在具有排列成行和列的单元的TCAM存储单元阵列中的三元内容可寻址存储器(TCAM)单元电路可以包括具有第一和第二数据路径的第一存储电路,具有第三和第四数据路径的第二存储电路,以及 比较电路。 在列方向上不超过四条导线与TCAM电池有直接电连接。 这样的导线可以包括耦合到第一数据路径和第三数据路径的第一位线和耦合到第二数据路径和第四数据路径的第二位线。

    Ternary content addressable memory (TCAM) cells with low signal line numbers
    2.
    发明授权
    Ternary content addressable memory (TCAM) cells with low signal line numbers 有权
    具有低信号行号的三元内容可寻址存储器(TCAM)单元

    公开(公告)号:US07570503B1

    公开(公告)日:2009-08-04

    申请号:US11438185

    申请日:2006-05-22

    IPC分类号: G11C15/00

    CPC分类号: G11C15/04

    摘要: A ternary content addressable memory (TCAM) cell circuit formed in a TCAM memory cell array having cells arranged in rows and columns can include a first storage circuit with first and second data path, a second storage circuit with a third and fourth data path, and a compare circuit. No more than four conductive lines in a column wise direction have a direct electrical connection to the TCAM cell. Such conductive lines can include a first bit line coupled to the first data path and the third data path and a second bit line coupled to the second data path and the fourth data path.

    摘要翻译: 形成在具有排列成行和列的单元的TCAM存储单元阵列中的三元内容可寻址存储器(TCAM)单元电路可以包括具有第一和第二数据路径的第一存储电路,具有第三和第四数据路径的第二存储电路,以及 比较电路。 在列方向上不超过四条导线与TCAM电池有直接电连接。 这样的导线可以包括耦合到第一数据路径和第三数据路径的第一位线和耦合到第二数据路径和第四数据路径的第二位线。

    Interlocking memory/logic cell layout and method of manufacture
    3.
    发明授权
    Interlocking memory/logic cell layout and method of manufacture 有权
    联锁存储器/逻辑单元布局和制造方法

    公开(公告)号:US07277309B1

    公开(公告)日:2007-10-02

    申请号:US11585460

    申请日:2006-10-23

    IPC分类号: G11C15/00

    摘要: A memory/logic cell layout structure includes a pair of memory/logic cells formed on a substrate. Each memory/logic cell (102, 104) can include a pair of memory areas to store data (106-0/106-1, 106-2/106-3), and a logic portion (108-0, 108-1) that receives the data stored therein. Memory areas and the logic portions of each memory/logic cell can be arranged on the substrate in a shape of an L, U, S, T, or Z to form a pair of interlocking memory/logic cells.

    摘要翻译: 存储器/逻辑单元布局结构包括形成在衬底上的一对存储器/逻辑单元。 每个存储器/逻辑单元(102,104)可以包括一对存储数据(106-0 / 106-1,106-2/106-3)的存储器区域和逻辑部分(108-0,08-1 ),其接收存储在其中的数据。 存储区域和每个存储器/逻辑单元的逻辑部分可以以L,U,S,T或Z的形状布置在衬底上,以形成一对互锁存储器/逻辑单元。

    Interlocking memory/logic cell layout and method of manufacture
    4.
    发明授权
    Interlocking memory/logic cell layout and method of manufacture 有权
    联锁存储器/逻辑单元布局和制造方法

    公开(公告)号:US07126837B1

    公开(公告)日:2006-10-24

    申请号:US11090116

    申请日:2005-03-24

    IPC分类号: G11C5/06

    摘要: A memory/logic cell layout structure includes a pair of memory/logic cells formed on a substrate. Each memory/logic cell (102, 104) can include a pair of memory areas to store data (106-0/106-1, 106-2/106-3), and a logic portion (108-0, 108-1) that receives the data stored therein. Memory areas and the logic portions of each memory/logic cell can be arranged on the substrate in a shape of an L, U, S, T, or Z to form a pair of interlocking memory/logic cells.

    摘要翻译: 存储器/逻辑单元布局结构包括形成在衬底上的一对存储器/逻辑单元。 每个存储器/逻辑单元(102,104)可以包括一对存储数据(106-0 / 106-1,106-2/106-3)的存储器区域和逻辑部分(108-0,08-1 ),其接收存储在其中的数据。 存储区域和每个存储器/逻辑单元的逻辑部分可以以L,U,S,T或Z的形状布置在衬底上,以形成一对互锁存储器/逻辑单元。

    Automatic built-in self-test of logic with seeding from on-chip memory
    5.
    发明授权
    Automatic built-in self-test of logic with seeding from on-chip memory 有权
    自动内置自检从片上存储器播种的逻辑

    公开(公告)号:US07346823B1

    公开(公告)日:2008-03-18

    申请号:US10876864

    申请日:2004-06-24

    IPC分类号: G01R31/28

    摘要: Built-in self-test (BIST) devices and methods are disclosed. A BIST section (100) according to one embodiment can include a built-in seed value memory (150) that stores multiple seed values. In a BIST operation, a seed value can be transferred from a built-in seed memory (150) to a test pattern generator (106) to generate multiple test patterns for scan chains (104-0 to 104-n). Successive seed values can be transferred to generate multiple test patterns sets at a clock speed and/or to achieve a desired test coverage.

    摘要翻译: 公开了内置的自检(BIST)设备和方法。 根据一个实施例的BIST部分(100)可以包括存储多个种子值的内置种子值存储器(150)。 在BIST操作中,种子值可以从内置种子存储器(150)传送到测试模式生成器(106),以产生用于扫描链(104-0至104-n)的多个测试模式。 可以传送连续种子值以便以时钟速度生成多个测试模式集合和/或实现期望的测试覆盖。

    AUTOMATIC TUBING DRAIN
    6.
    发明申请
    AUTOMATIC TUBING DRAIN 审中-公开
    自动排水

    公开(公告)号:US20150354318A1

    公开(公告)日:2015-12-10

    申请号:US14442702

    申请日:2012-11-13

    申请人: Andrew Wright

    发明人: Andrew Wright

    IPC分类号: E21B34/12

    摘要: An automatic tubing drain for rotary pumps automatically closes when the pump starts and opens when the pump stops using reactive torque generated by the pump.

    摘要翻译: 当泵停止使用泵产生的无功扭矩时,泵启动时,旋转泵的自动排液管自动关闭。

    Dispensing apparatus
    7.
    发明授权
    Dispensing apparatus 有权
    点胶装置

    公开(公告)号:US08291898B2

    公开(公告)日:2012-10-23

    申请号:US11802558

    申请日:2007-05-23

    IPC分类号: A61M11/00 A61M11/08

    CPC分类号: A61M15/009 A61M15/0073

    摘要: The present invention provides a dispensing apparatus for delivering metered doses of product from a pressurised dispensing container comprising: a housing comprising a body portion and a removable mouthpiece, the body portion containing a dose counting mechanism and a sleeve; the body portion comprising an aperture through which said pressurised dispensing container can pass to be received in the sleeve but through which the sleeve is unable to pass such that the sleeve is retained within the body portion; the sleeve being located in the body portion such that an upper end of said pressurised dispensing container when received in the sleeve is accessible to allow actuation of said pressurised dispensing container; the apparatus comprising means for retaining said pressurised dispensing container in the body portion.

    摘要翻译: 本发明提供了一种用于从加压分配容器输送计量剂量的产品的分配装置,包括:壳体,其包括主体部分和可移除的接口,所述主体部分包含剂量计数机构和套筒; 所述主体部分包括孔,所述加压分配容器可穿过所述孔容纳在所述套筒中,但是所述套筒不能通过所述孔,使得所述套筒保持在所述主体部分内; 所述套筒位于所述主体部分中,使得所述加压分配容器的上端在容纳在所述套筒中时可接近以允许所述加压分配容器的致动; 该装置包括用于将所述加压分配容器保持在主体部分中的装置。

    TRANSACTION LOG MANAGEMENT
    8.
    发明申请
    TRANSACTION LOG MANAGEMENT 有权
    交易日志管理

    公开(公告)号:US20120124021A1

    公开(公告)日:2012-05-17

    申请号:US13355555

    申请日:2012-01-22

    IPC分类号: G06F17/30

    摘要: Managing a log-full condition of a transaction log in a transaction processing system, where the transaction log has a plurality of log records each associated with a particular transaction. When a log-full condition is detected, the active transaction having the oldest log entry of all active transactions is identified and logging for all transactions except for the identified transaction is temporarily suspended. A dynamic transaction backout of the identified transaction is initiated, with the writing of a backout record for the identified transaction to the log being delayed. Confirmation that the backout has completed is awaited before trimming the log. Then the delayed backout record for the identified transaction is written to the log, and normal logging is resumed.

    摘要翻译: 管理事务处理系统中事务日志的日志完整状态,其中事务日志具有多个与特定事务相关联的日志记录。 当检测到日志完整条件时,识别所有活动事务的最早日志条目的活动事务,并且所有事务的日志记录被暂停。 启动所识别的事务的动态事务回退,其中写入用于所识别的事务的回退记录被延迟。 在修剪日志之前,等待已经完成回退的确认。 然后将标识的事务的延迟回退记录写入日志,并恢复正常日志记录。

    Variable valve timing control
    9.
    发明授权
    Variable valve timing control 有权
    可变气门正时控制

    公开(公告)号:US07806093B2

    公开(公告)日:2010-10-05

    申请号:US11808321

    申请日:2007-06-08

    申请人: Andrew Wright

    发明人: Andrew Wright

    IPC分类号: F01L1/34

    摘要: Engine control is provided for an engine having a crankshaft and at least one camshaft with variable valve timing in a rotation transmitting train between the crankshaft and the camshaft. A first value indicative of a cam angle at a home position at a first time is compared to a second value indicative of a cam angle at the home position at a second, earlier, time. Where a deviation in the compared values is detected that does not exceed a threshold value, the first value is stored for use in a subsequent comparison. Where a deviation in the compared values is detected that does exceed a threshold value, a failure condition is detected and the MIL light is illuminated. In this case, the value stored for comparison is not updated.

    摘要翻译: 对于具有曲轴的发动机和在曲轴和凸轮轴之间的旋转传动系中具有可变气门正时的至少一个凸轮轴的发动机控制。 将在第一时间将起始位置处的凸轮角度指示的第一值与指示在第二,较早时间的起始位置处的凸轮角度的第二值进行比较。 在检测到不超过阈值的比较值的偏差的情况下,存储第一值用于随后的比较。 在检测到超过阈值的比较值的偏差的情况下,检测到故障状态并照亮MIL光。 在这种情况下,存储的用于比较的值不会更新。