Integrated circuit fan-in for semiconductor transducer devices
    1.
    发明授权
    Integrated circuit fan-in for semiconductor transducer devices 失效
    用于半导体传感器器件的集成电路引入

    公开(公告)号:US5457311A

    公开(公告)日:1995-10-10

    申请号:US092640

    申请日:1993-07-16

    CPC分类号: B41J2/45 H01L27/146

    摘要: A wide semiconductor transducer device comprises a linear array of semiconductor chips. Each of the semiconductor chips has a plurality of transducer elements arranged on it along a front edge at a constant spacing, the constant spacing being maintained across the semiconductor chip boundaries. Each of the semiconductor chips also includes associated transducer circuits which are each connected one of the plurality of transducer elements formed on the semiconductor chip. While the requirement that the transducer elements maintain the constant spacing requires them to be located within a damage zone created during the dicing and/or thermally induced compression of the semiconductor chip, the associated transducer circuits can be located within an interior portion of the semiconductor chip. The interior portion of the semiconductor chip is located a sufficient distance from the edges of the semiconductor chip such that it does not encroach on the damage zone.

    摘要翻译: 宽的半导体传感器装置包括半导体芯片的线性阵列。 每个半导体芯片具有沿着前边缘以恒定间隔布置在其上的多个换能器元件,恒定间隔保持在半导体芯片边界两边。 每个半导体芯片还包括相关联的换能器电路,它们各自连接形成在半导体芯片上的多个换能器元件中的一个。 虽然传感器元件保持恒定间隔的要求要求它们位于在半导体芯片的切割和/或热诱导压缩期间产生的损伤区域内,但是相关联的换能器电路可以位于半导体芯片的内部部分内 。 半导体芯片的内部部分位于与半导体芯片的边缘足够的距离处,使得它不会侵入损伤区域。

    Ode through holes and butt edges without edge dicing
    2.
    发明授权
    Ode through holes and butt edges without edge dicing 失效
    通过孔和对接边缘没有边缘切割

    公开(公告)号:US4961821A

    公开(公告)日:1990-10-09

    申请号:US440296

    申请日:1989-11-22

    摘要: At least one through opening of predetermined location and dimensions is fabricated in a (100) silicon wafer by orientation dependent etching method after completion of integrated circuits on the wafer, the opening extending through the wafer between a circuit surface of the wafer and an opposite parallel base surface of the wafer and having a predetermined location relative to the integrated circuit on the circuit surface of the wafer. The method includes the steps of fabricating the integrated circuit on the circuit surface of the wafer; applying an etch resistant layer of plasma solicon nitride on the circuit and base surfaces of the wafer; patterning the etch resistant plasma silicon nitride layer on the circuit surface to define an upper etch opening having a location and dimensions which define the predetermined location and dimensions of the through opening; and patterning the plasma silicon nitride layer on the base surface to produce a lower etch opening aligned with the upper etch opening within a predetermined tolerance. The wafer is then anisotropically etched to produce a first recess corresponding to the upper etch opening in the circuit surface and a second recess corresponding to the lower etch opening in the base surface, each of the first and second recesses being bounded by (111) plane side walls. The anisotropic etching of the second recess intersects the first recess to form the through opening bounded by (111) plane side walls and has its predetermined dimensions and location defined by the patterning of the upper etch opening.

    Electronic spot size control in a thermal ink jet printer
    3.
    发明授权
    Electronic spot size control in a thermal ink jet printer 失效
    热喷墨打印机中的电子光点尺寸控制

    公开(公告)号:US5223853A

    公开(公告)日:1993-06-29

    申请号:US840239

    申请日:1992-02-24

    IPC分类号: B41J2/05 B41J2/125 G01D15/18

    摘要: A system controls an ink jet printing apparatus for propelling ink jet droplets on demand from a printhead having a plurality of drop ejectors. In the printhead, each ejector includes a heating element actuable in response to electrical input signals, each input signal having an amplitude and a time duration, selectably applied to the heating element to produce a temporary vapor bubble and cause a quantity of ink to be emitted for the creation of a mark on a copy sheet. The temperature of ink in the printhead is sensed, and a combination of power level and time duration of the electrical input signal for the heating element to result in a desired size of the mark of the copy sheet is selected, by entering the sensed temperature of the ink into a predetermined function relating the energy of the electrical input signal to the corresponding resulting size of the mark on the copy sheet.

    摘要翻译: 系统控制喷墨打印设备,用于根据需要从具有多个液滴喷射器的打印头推进喷墨滴。 在打印头中,每个喷射器包括可响应于电输入信号而致动的加热元件,每个输入信号具有可选择地施加到加热元件的振幅和持续时间,以产生暂时的蒸汽气泡并导致一定量的墨水被排出 用于在复印纸上创建标记。 感测到打印头中的墨水的温度,并且通过输入检测到的温度来选择加热元件的电输入信号的持续时间的组合以产生所需的复印纸的标记尺寸 油墨成为将电输入信号的能量与复印纸上的标记的相应结果尺寸相关联的预定功能。

    Thermal ink jet heater design
    4.
    发明授权
    Thermal ink jet heater design 失效
    热喷墨加热器设计

    公开(公告)号:US06315398B1

    公开(公告)日:2001-11-13

    申请号:US07963969

    申请日:1992-10-21

    IPC分类号: B41J205

    摘要: The new heater element design has a pit layer which protects the overglaze passivation layer, PSG step region, portions of the Ta layer and dielectric isolation layer and junctions or regions susceptible to the cavitational pressures. Further, the inner walls of the pit layer define the effective heater area and the dopant lines define the actual heater area. In alternative embodiments, the dopant lines define the actual and effective heater areas, and an inner wall and a dopant line define the actual and effective heater areas. Further, when the new heater element designs are incorporated into printheads having full pit channel geometry and open pit channel geometry, the operating lifetime of the printhead is extended because the added protection of the pit layer prevents: 1) passivation damage and cavitational damages of the heater elements; and 2) degradation of heater robustness, hot spot formations and heater failures well into the 109 pulse range. The printhead incorporating the new heater element design can be incorporated into drop-on-demand printing systems of a carriage type or a full width type.

    摘要翻译: 新的加热器元件设计具有凹坑层,其保护釉面钝化层,PSG阶梯区域,Ta层和电介质隔离层的部分以及对空穴压力敏感的结或区域。 此外,凹坑层的内壁限定有效的加热器面积,并且掺杂剂线限定实际的加热器面积。 在替代实施例中,掺杂剂线限定实际和有效的加热器区域,并且内壁和掺杂剂线限定实际和有效的加热器区域。 此外,当新的加热器元件设计结合到具有全坑通道几何形状和露天通道几何形状的打印头中时,打印头的工作寿命延长,因为凹坑层的附加保护防止:1)钝化损伤和空穴损伤 加热元件; 和2)加热器鲁棒性,热点形成和加热器故障的恶化达到109脉冲范围。 包含新的加热器元件设计的打印头可以结合到托架型或全宽型的按需按需打印系统中。

    Office environment level electrostatic discharge protection
    6.
    发明授权
    Office environment level electrostatic discharge protection 失效
    办公环境级静电放电保护

    公开(公告)号:US5428498A

    公开(公告)日:1995-06-27

    申请号:US952015

    申请日:1992-09-28

    CPC分类号: H01L27/0251 H01L27/0259

    摘要: An electrostatic discharge protection device for a connector associated with an integrated circuit chip, particularly one associated with a thermal ink-jet printhead. A MOS field effect device extends along at least one edge of the connector on the chip. A bipolar transistor, parasitic to the field effect device, conducts current from the connector to ground in response to a voltage between the connector and ground in excess of a predetermined threshold. A zone of a predetermined electrical resistance is operatively disposed between the bipolar transistor and ground. The zone may substantially encircle the bonding pad of the connector to evenly distribute local incidences of high voltage. The invention enables integrated circuits to pass ESD requirements of office products, which is 15 kV by Human Body Model testing.

    摘要翻译: 一种用于与集成电路芯片相关联的连接器的静电放电保护装置,特别是与热喷墨打印头相关联的静电放电保护装置。 MOS场效应器件沿芯片上连接器的至少一个边缘延伸。 寄生到场效应器件的双极晶体管响应于连接器和地之间的电压超过预定阈值而将电流从连接器传导到地。 预定电阻的区域可操作地设置在双极晶体管和地之间。 该区域可以基本上环绕连接器的焊盘,以均匀分布高电压的局部发生。 本发明使得集成电路能够通过人体模型测试传递15kV的办公产品的ESD要求。

    Polysilicon feed-through fluid drop ejector
    7.
    发明授权
    Polysilicon feed-through fluid drop ejector 失效
    多晶硅直通液滴喷射器

    公开(公告)号:US06905196B2

    公开(公告)日:2005-06-14

    申请号:US10431540

    申请日:2003-05-08

    IPC分类号: B41J2/14 B41J2/05

    摘要: A fluid ejector includes a fluid channel having a resistive heater and terminating in a nozzle, a common bus formed transverse to the fluid channel and between the resistive heater and the nozzle, a connection line laterally adjacent to the fluid channel, and a connection structure for electrically connecting the common bus with the resistive heater and the connection line, the connection structure including a first set of one or more layers for electrical connection and a second set of one or more layers for covering the common bus and connection line. The first set of one or more layers includes a doped polysilicon layer on or overlaid by an optional tantalum-silicide layer. The second set of one or more layers includes a nitride layer on or overlaid by a tantalum layer.

    摘要翻译: 流体喷射器包括具有电阻加热器并终止于喷嘴的流体通道,与流体通道横向于电阻加热器和喷嘴之间的公共总线,与流体通道横向相邻的连接管线,以及用于 将公共总线与电阻加热器和连接线电连接,连接结构包括用于电连接的一个或多个层的第一组和用于覆盖公共总线和连接线的一个或多个层的第二组。 第一组一层或多层包括在可选的硅化硅层上或由可选的硅化硅层覆盖的掺杂多晶硅层。 第二组一层或多层包括在钽层上或覆盖钽层的氮化物层。

    Office environment level electrostatic discharge protection
    9.
    发明授权
    Office environment level electrostatic discharge protection 失效
    办公环境级静电放电保护

    公开(公告)号:US5532901A

    公开(公告)日:1996-07-02

    申请号:US387516

    申请日:1995-02-13

    CPC分类号: H01L27/0251 H01L27/0259

    摘要: An electrostatic discharge protection device for a connector associated with an integrated circuit chip, particularly one associated with a thermal ink-jet printhead. AMOS field effect device extends along at least one edge of the connector on the chip. A bipolar transistor, parasitic to the field effect device, conducts current from the connector to ground in response to a voltage between the connector and ground in excess of a predetermined threshold. A zone of a predetermined electrical resistance is operatively disposed between the bipolar transistor and ground. The zone may substantially encircle the bonding pad of the connector to evenly distribute local incidences of high voltage. The invention enables integrated circuits to pass ESD requirements of office products, which is 15 kV by Human Body Model testing.

    摘要翻译: 一种用于与集成电路芯片相关联的连接器的静电放电保护装置,特别是与热喷墨打印头相关联的静电放电保护装置。 AMOS场效应器件沿芯片上连接器的至少一个边缘延伸。 寄生到场效应器件的双极晶体管响应于连接器和地之间的电压超过预定阈值而将电流从连接器传导到地。 预定电阻的区域可操作地设置在双极晶体管和地之间。 该区域可以基本上环绕连接器的焊盘,以均匀分布高电压的局部发生。 本发明使得集成电路能够通过人体模型测试传递15kV的办公产品的ESD要求。

    "> Buttable subunits for pagewidth
    10.
    发明授权
    Buttable subunits for pagewidth "Roofshooter" printheads 失效
    页面宽度“Roofshooter”打印头的Buttable子单元

    公开(公告)号:US4985710A

    公开(公告)日:1991-01-15

    申请号:US442641

    申请日:1989-11-29

    IPC分类号: B41J2/05 B41J2/155 B41J2/16

    摘要: A "roofshooter" pagewidth printhead for use in a thermal ink jet printing device is fabricated by forming a plurality of subunits, each being produced by bonding a heater substrate having an architecture including an array of heater elements and an etched ink feed slot to a secondary substrate having a series of spaced feed hole openings to form a combined substrate in which said series of spaced feed hole openings communicates with said ink feed slot, and dicing said combined substrates through said ink feed slot to form a subunit. An array of butted subunits having a length equal to one pagewidth is formed by butting one of said subunits against an adjacent subunit. The array of butted subunits is bonded to a pagewidth support substrate. The secondary substrate provides an integral support structure for maintaining the alignment of the heater plate which, if diced through the feed hole without the secondary substrate, would separate into individual pieces, thereby complicating the alignment and assembly process.