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公开(公告)号:US07838886B2
公开(公告)日:2010-11-23
申请号:US12401959
申请日:2009-03-11
申请人: Dong-Gyu Kim , Sung-Haeng Cho , Hyung-Jun Kim , Sung-Ryul Kim , Yong-Mo Choi
发明人: Dong-Gyu Kim , Sung-Haeng Cho , Hyung-Jun Kim , Sung-Ryul Kim , Yong-Mo Choi
IPC分类号: H01L29/04
CPC分类号: G02F1/136213 , H01L27/1255
摘要: A thin film transistor array panel, in which a middle storage electrode and a storage electrode overlapping a drain electrode of a thin film transistor thereby forming a storage capacitance are formed. Accordingly, sufficient storage capacitance may be formed without a decrease of the aperture ratio and fight transmittance of a liquid crystal display. Also, the capacitance may be sufficiently formed through the connecting member connected to a gate metal layer.
摘要翻译: 一种薄膜晶体管阵列面板,其中形成中间存储电极和与薄膜晶体管的漏极重叠从而形成存储电容的存储电极。 因此,可以形成足够的存储电容,而不会降低开口率并且防止液晶显示器的透射率。 此外,可以通过连接到栅极金属层的连接构件充分形成电容。
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公开(公告)号:US08183570B2
公开(公告)日:2012-05-22
申请号:US12946953
申请日:2010-11-16
申请人: Dong-Gyu Kim , Sung-Haeng Cho , Hyung-Jun Kim , Sung-Ryul Kim , Yong-Mo Choi
发明人: Dong-Gyu Kim , Sung-Haeng Cho , Hyung-Jun Kim , Sung-Ryul Kim , Yong-Mo Choi
IPC分类号: H01L29/04
CPC分类号: G02F1/136213 , H01L27/1255
摘要: A thin film transistor array panel, in which a middle storage electrode and a storage electrode overlapping a drain electrode of a thin film transistor thereby forming a storage capacitance are formed. Accordingly, sufficient storage capacitance may be formed without a decrease of the aperture ratio and light transmittance of a liquid crystal display. Also, the capacitance may be sufficiently formed through the connecting member connected to a gate metal layer.
摘要翻译: 一种薄膜晶体管阵列面板,其中形成中间存储电极和与薄膜晶体管的漏极重叠从而形成存储电容的存储电极。 因此,可以形成足够的存储电容,而不会降低液晶显示器的开口率和透光率。 此外,可以通过连接到栅极金属层的连接构件充分形成电容。
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公开(公告)号:US20110057194A1
公开(公告)日:2011-03-10
申请号:US12946953
申请日:2010-11-16
申请人: DONG-GYU KIM , Sung-Haeng Cho , Hyung-Jun Kim , Sung-Ryul Kim , Yong-Mo Choi
发明人: DONG-GYU KIM , Sung-Haeng Cho , Hyung-Jun Kim , Sung-Ryul Kim , Yong-Mo Choi
IPC分类号: H01L33/16
CPC分类号: G02F1/136213 , H01L27/1255
摘要: A thin film transistor array panel, in which a middle storage electrode and a storage electrode overlapping a drain electrode of a thin film transistor thereby forming a storage capacitance are formed. Accordingly, sufficient storage capacitance may be formed without a decrease of the aperture ratio and light transmittance of a liquid crystal display. Also, the capacitance may be sufficiently formed through the connecting member connected to a gate metal layer.
摘要翻译: 一种薄膜晶体管阵列面板,其中形成中间存储电极和与薄膜晶体管的漏极重叠从而形成存储电容的存储电极。 因此,可以形成足够的存储电容,而不会降低液晶显示器的开口率和透光率。 此外,可以通过连接到栅极金属层的连接构件充分形成电容。
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4.
公开(公告)号:US20100270552A1
公开(公告)日:2010-10-28
申请号:US12571323
申请日:2009-09-30
申请人: Ki-Yong Song , Sung-Haeng Cho , Jae-Hong Kim , Sung-Hen Cho , Yong-Mo Choi , Hyung-Jun Kim , Sung-Ryul Kim , Byeong-Hoon Cho , O-Sung Seo , Seong-Hun Kim
发明人: Ki-Yong Song , Sung-Haeng Cho , Jae-Hong Kim , Sung-Hen Cho , Yong-Mo Choi , Hyung-Jun Kim , Sung-Ryul Kim , Byeong-Hoon Cho , O-Sung Seo , Seong-Hun Kim
CPC分类号: C23C18/1608 , C23C18/31 , H01L21/0271 , H01L27/124 , H01L27/1288 , H01L29/41733 , H01L29/458 , Y10T156/10
摘要: A protrusion of dry-etched pattern of a thin film transistor substrate generated due to a difference between isotropy of wet etching and anisotropy of dry etching is removed by forming a plating part on a surface of the wet etched pattern through an electroless plating method. If the plating part is formed on a data pattern layer of the substrate, the width or the thickness of the data pattern layer may be increased without loss of aperture ratio, the channel length of the semiconductor layer may be reduced under the limit according to the stepper resolution and the protrusion part of the semiconductor layer may be removed. As a result, the aperture ratio may be increased, the resistance may be reduced, and the driving margin may be increased due to rising of the ion current. Furthermore, the so-called water-fall noise phenomenon may be eliminated.
摘要翻译: 通过化学镀法在湿蚀刻图案的表面上形成电镀部分,可以消除由于湿蚀刻的各向同性和干蚀刻的各向异性而产生的薄膜晶体管基板的干蚀刻图案的突起。 如果电镀部分形成在基板的数据图案层上,则数据图形层的宽度或厚度可以增加而不损失开口率,半导体层的沟道长度可以在根据 可以去除步进分辨率和半导体层的突起部分。 结果,可以增加开口率,可以降低电阻,并且由于离子电流的上升可能增加驱动裕度。 此外,可以消除所谓的水落噪声现象。
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公开(公告)号:US20110181557A1
公开(公告)日:2011-07-28
申请号:US12900846
申请日:2010-10-08
申请人: HYUNG-JUN KIM , Sung-Haeng Cho , Yong-Mo Choi
发明人: HYUNG-JUN KIM , Sung-Haeng Cho , Yong-Mo Choi
CPC分类号: G11C19/28 , G02F1/1362 , G02F2202/104 , G11C19/184
摘要: A display substrate includes a base substrate, a first insulating layer formed on a base substrate, a pixel including a pixel electrode having the first insulating layer, and a circuit including a circuit transistor disposed on a peripheral area to drive the pixel. The pixel includes a first channel formed on the base substrate having the first insulating layer formed thereon. The first channel includes a poly-silicon layer, a first source electrode and a first drain electrode formed on the first channel that are spaced apart from each other, and a first gate electrode formed on the first source electrode and the first drain electrode corresponding to the first channel which is formed of the transparent conductive material. The poly-silicon layer is formed at a front channel portion of the first channel proximal to the first gate electrode through the first gate electrode.
摘要翻译: 显示基板包括基底基板,形成在基底基板上的第一绝缘层,包括具有第一绝缘层的像素电极的像素,以及包括设置在外围区域上以驱动像素的电路晶体管的电路。 像素包括形成在其上形成有第一绝缘层的基底基板上的第一通道。 第一通道包括形成在第一通道上彼此间隔开的多晶硅层,第一源电极和第一漏极,以及形成在第一源电极和第一漏电极上的第一栅电极, 由透明导电材料形成的第一通道。 多晶硅层通过第一栅电极形成在靠近第一栅电极的第一通道的前通道部分处。
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公开(公告)号:US08952876B2
公开(公告)日:2015-02-10
申请号:US12900846
申请日:2010-10-08
申请人: Hyung-Jun Kim , Sung-Haeng Cho , Yong-Mo Choi
发明人: Hyung-Jun Kim , Sung-Haeng Cho , Yong-Mo Choi
IPC分类号: G09G3/36 , G11C19/28 , G02F1/1362 , G11C19/18
CPC分类号: G11C19/28 , G02F1/1362 , G02F2202/104 , G11C19/184
摘要: A display substrate includes a base substrate, a first insulating layer formed on a base substrate, a pixel including a pixel electrode having the first insulating layer, and a circuit including a circuit transistor disposed on a peripheral area to drive the pixel. The pixel includes a first channel formed on the base substrate having the first insulating layer formed thereon. The first channel includes a poly-silicon layer, a first source electrode and a first drain electrode formed on the first channel that are spaced apart from each other, and a first gate electrode formed on the first source electrode and the first drain electrode corresponding to the first channel which is formed of the transparent conductive material. The poly-silicon layer is formed at a front channel portion of the first channel proximal to the first gate electrode through the first gate electrode.
摘要翻译: 显示基板包括基底基板,形成在基底基板上的第一绝缘层,包括具有第一绝缘层的像素电极的像素,以及包括设置在外围区域上以驱动像素的电路晶体管的电路。 像素包括形成在其上形成有第一绝缘层的基底基板上的第一通道。 第一通道包括形成在第一通道上彼此间隔开的多晶硅层,第一源电极和第一漏极,以及形成在第一源电极和第一漏电极上的第一栅电极, 由透明导电材料形成的第一通道。 多晶硅层通过第一栅电极形成在靠近第一栅电极的第一通道的前通道部分处。
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公开(公告)号:US20120133873A1
公开(公告)日:2012-05-31
申请号:US13193488
申请日:2011-07-28
申请人: Ji-Young PARK , Sang Gab Kim , Yong-Mo Choi , Hyung Jun Kim , Sung-Haeng Cho , Hong-Sick Park , Byeong-Jin Lee , Soo-Wan Yoon
发明人: Ji-Young PARK , Sang Gab Kim , Yong-Mo Choi , Hyung Jun Kim , Sung-Haeng Cho , Hong-Sick Park , Byeong-Jin Lee , Soo-Wan Yoon
IPC分类号: G02F1/1333 , H01L33/16
CPC分类号: H01L27/1288 , G02F1/1362 , G02F2001/136231 , H01L29/41733
摘要: A method of manufacturing a liquid crystal display includes: forming a gate line including a gate electrode on a first substrate; forming a gate insulating layer on the gate line; sequentially forming a semiconductor layer, an amorphous silicon layer, and a data metal layer on the entire surface of the gate insulating layer; aligning the edges of the semiconductor layer and the data metal layer; forming a transparent conductive layer on the gate insulating layer and the data metal layer; forming a first pixel electrode and a second pixel electrode by patterning the transparent conductive layer; and forming a data line including a source electrode, a drain electrode, and an ohmic contact layer by etching the data metal layer and the amorphous silicon layer, using the first pixel electrode and the second pixel electrode as a mask, and exposing the semiconductor between the source electrode and the drain electrode.
摘要翻译: 制造液晶显示器的方法包括:在第一基板上形成包括栅电极的栅极线; 在栅极线上形成栅极绝缘层; 在栅极绝缘层的整个表面上依次形成半导体层,非晶硅层和数据金属层; 对准半导体层和数据金属层的边缘; 在栅绝缘层和数据金属层上形成透明导电层; 通过图案化透明导电层形成第一像素电极和第二像素电极; 以及使用所述第一像素电极和所述第二像素电极作为掩模,通过蚀刻所述数据金属层和所述非晶硅层来形成包括源电极,漏电极和欧姆接触层的数据线,并且使所述半导体在 源电极和漏电极。
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公开(公告)号:US08755019B2
公开(公告)日:2014-06-17
申请号:US13193488
申请日:2011-07-28
申请人: Ji-Young Park , Sang Gab Kim , Yong-Mo Choi , Hyung Jun Kim , Sung-Haeng Cho , Hong-Sick Park , Byeong-Jin Lee , Soo-Wan Yoon
发明人: Ji-Young Park , Sang Gab Kim , Yong-Mo Choi , Hyung Jun Kim , Sung-Haeng Cho , Hong-Sick Park , Byeong-Jin Lee , Soo-Wan Yoon
IPC分类号: G02F1/1339 , G02F1/13
CPC分类号: H01L27/1288 , G02F1/1362 , G02F2001/136231 , H01L29/41733
摘要: A method of manufacturing a liquid crystal display includes: forming a gate line including a gate electrode on a first substrate; forming a gate insulating layer on the gate line; sequentially forming a semiconductor layer, an amorphous silicon layer, and a data metal layer on the entire surface of the gate insulating layer; aligning the edges of the semiconductor layer and the data metal layer; forming a transparent conductive layer on the gate insulating layer and the data metal layer; forming a first pixel electrode and a second pixel electrode by patterning the transparent conductive layer; and forming a data line including a source electrode, a drain electrode, and an ohmic contact layer by etching the data metal layer and the amorphous silicon layer, using the first pixel electrode and the second pixel electrode as a mask, and exposing the semiconductor between the source electrode and the drain electrode.
摘要翻译: 制造液晶显示器的方法包括:在第一基板上形成包括栅电极的栅极线; 在栅极线上形成栅极绝缘层; 在栅极绝缘层的整个表面上依次形成半导体层,非晶硅层和数据金属层; 对准半导体层和数据金属层的边缘; 在栅绝缘层和数据金属层上形成透明导电层; 通过图案化透明导电层形成第一像素电极和第二像素电极; 以及使用所述第一像素电极和所述第二像素电极作为掩模,通过蚀刻所述数据金属层和所述非晶硅层来形成包括源电极,漏电极和欧姆接触层的数据线,并且使所述半导体在 源电极和漏电极。
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9.
公开(公告)号:US08174660B2
公开(公告)日:2012-05-08
申请号:US12332249
申请日:2008-12-10
申请人: Sung Ryul Kim , Yong-Mo Choi , Sung-Hoon Yang , Hwa-Yeul Oh , Kap-Soo Yoon , Jae-Ho Choi , Seong-Hun Kim
发明人: Sung Ryul Kim , Yong-Mo Choi , Sung-Hoon Yang , Hwa-Yeul Oh , Kap-Soo Yoon , Jae-Ho Choi , Seong-Hun Kim
IPC分类号: G02F1/1343
CPC分类号: G02F1/136286 , G02F2001/13629 , G02F2001/136295 , Y10T428/24975
摘要: Provided are a metal line, a method of forming the same, and a display using the same. To increase resistance of a metal line having a multilayered structure of CuO/Cu and prevent blister formation, a plasma treatment is performed using a nitrogen-containing gas and a silicon-containing gas or using a hydrogen or argon as and the silicon-containing gas. Accordingly, a plasma treatment layer such as a SiNx or Si layer is thinly formed on the copper layer, thereby preventing an increase in resistance of the copper layer and also preventing blister formation caused by the damage of a copper oxide layer. Consequently, it is possible to improve the reliability of a copper line and thus enhance the reliability of a device.
摘要翻译: 提供一种金属线,其形成方法和使用该线的显示器。 为了增加具有CuO / Cu多层结构的金属线的电阻并防止起泡形成,使用含氮气体和含硅气体或使用氢或氩作为含硅气体进行等离子体处理 。 因此,在铜层上薄膜地形成诸如SiN x或Si层的等离子体处理层,从而防止铜层的电阻增加,并且还防止由氧化铜层损坏引起的起泡形成。 因此,可以提高铜线的可靠性,从而提高装置的可靠性。
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公开(公告)号:US07847291B2
公开(公告)日:2010-12-07
申请号:US12486328
申请日:2009-06-17
申请人: Kap-Soo Yoon , Sung-Hoon Yang , Sung-Ryul Kim , O-Sung Seo , Hwa-Yeul Oh , Jae-Ho Choi , Seong-Hun Kim , Yong-Mo Choi
发明人: Kap-Soo Yoon , Sung-Hoon Yang , Sung-Ryul Kim , O-Sung Seo , Hwa-Yeul Oh , Jae-Ho Choi , Seong-Hun Kim , Yong-Mo Choi
IPC分类号: H01L29/04
CPC分类号: H01L27/12 , H01L27/1225 , H01L29/7869
摘要: A display substrate includes; a substrate, a gate electrode arranged on the substrate, a semiconductor pattern arranged on the gate electrode, a source electrode arranged on the semiconductor pattern, a drain electrode arranged on the semiconductor pattern and spaced apart from the source electrode, an insulating layer arranged on, and substantially covering, the source electrode and the drain electrode to cover the source electrode and the drain electrode, a conductive layer pattern arranged on the insulating layer and overlapped aligned with the semiconductor pattern, a pixel electrode electrically connected to the drain electrode, and a storage electrode arranged on the substrate and overlapped overlapping with the pixel electrode, the storage electrode being electrically connected to the conductive layer pattern.
摘要翻译: 显示基板包括: 衬底,布置在衬底上的栅电极,布置在栅电极上的半导体图案,布置在半导体图案上的源电极,布置在半导体图案上并与源电极间隔开的漏电极,布置在 并且基本上覆盖源电极和漏极以覆盖源电极和漏电极,布置在绝缘层上并与半导体图案重叠的导电层图案,与漏电极电连接的像素电极,以及 存储电极,设置在所述基板上,与所述像素电极重叠地重叠,所述存储电极与所述导电层图案电连接。
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