公开(公告)号：US20060044861A1

公开(公告)日：2006-03-02

申请号：US10929609

申请日：2004-08-31

Applicant: Douglas Smith ,  Myron Buer ,  Bassem Radieddine

Inventor： Douglas Smith ,  Myron Buer ,  Bassem Radieddine

IPC: G11C17/00

CPC classification number: G11C17/16

Abstract: A one-time programmable device includes a controller, a protection system, a static storage element and a latch, which can be referred to as a latch-based one-time programmable (OTP) element. In one example, the static storage element comprises a thin gate-oxide that acts as a resistance element, which, depending on whether its blown, sets the latch into one of two states.

Abstract translation: 一次性可编程设备包括控制器，保护系统，静态存储元件和锁存器，其可被称为基于锁存器的一次可编程（OTP）元件。 在一个示例中，静态存储元件包括用作电阻元件的薄栅极氧化物，其根据其是否被熔断将锁存器设置为两种状态之一。

公开(公告)号：US20070041246A1

公开(公告)日：2007-02-22

申请号：US11589115

申请日：2006-10-30

Applicant: Douglas Smith ,  Myron Buer ,  Bassem Radieddine

Inventor： Douglas Smith ,  Myron Buer ,  Bassem Radieddine

IPC: G11C11/34

CPC classification number: G11C17/16

Abstract: A one-time programmable device includes a controller, a protection system, a static storage element and a latch, which can be referred to as a latch-based one-time programmable (OTP) element. In one example, the static storage element includes a thin gate-oxide that acts as a resistance element, which, depending on whether its blown, sets the latch into one of two states.

Abstract translation: 一次性可编程设备包括控制器，保护系统，静态存储元件和锁存器，其可被称为基于锁存器的一次可编程（OTP）元件。 在一个示例中，静态存储元件包括用作电阻元件的薄栅极氧化物，其根据其是否被熔断将锁存器设置为两种状态之一。

公开(公告)号：US06901004B2

公开(公告)日：2005-05-31

申请号：US10856117

申请日：2004-05-28

Applicant: Douglas D. Smith ,  Myron Buer ,  Bassem Radieddine

Inventor： Douglas D. Smith ,  Myron Buer ,  Bassem Radieddine

IPC: G11C17/16 ,  H01L23/525 ,  G11C11/00

CPC classification number: H01L23/5256 ,  G11C17/16 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The present invention relates to a high voltage switch used with a one-time programmable memory device and a method of setting a state of a one-time programmable memory device using such a high voltage switch. The memory device includes a plurality of one time programmable memory cells arranged in an array and adapted to be programmed using a high voltage, wherein each of the memory cells includes at least one storage element and two gated fuses connected to the storage element. A high voltage switch is connected to at least one of the memory cells and is adapted to switch in a high voltage.

Abstract translation: 本发明涉及一次性可编程存储装置中使用的高电压开关和使用这种高电压开关来设定一次可编程存储装置的状态的方法。 存储器件包括以阵列布置并适于使用高电压编程的多个一次可编程存储器单元，其中每个存储器单元包括连接到存储元件的至少一个存储元件和两个门控保险丝。 高电压开关连接到至少一个存储单元并适于切换高电压。

公开(公告)号：US06693819B2

公开(公告)日：2004-02-17

申请号：US10041296

申请日：2002-01-08

Applicant: Douglas D. Smith ,  Myron Buer ,  Bassem Radieddine

Inventor： Douglas D. Smith ,  Myron Buer ,  Bassem Radieddine

IPC: G11C1100

CPC classification number: H01L23/5256 ,  G11C17/16 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The present invention relates to a high voltage switch used with a one-time programmable memory device and a method of setting a state of a one-time programmable memory device using such a high voltage switch. The memory device includes a plurality of one time programmable memory cells arranged in an array and adapted to be programmed using a high voltage, wherein each of the memory cells includes at least one storage element and two gated fuses connected to the storage element. A high voltage switch is connected to at least one of the memory cells and is adapted to switch in a high voltage.

Abstract translation: 本发明涉及一次性可编程存储装置中使用的高电压开关和使用这种高电压开关来设定一次可编程存储装置的状态的方法。 存储器件包括以阵列布置并适于使用高电压编程的多个一次可编程存储器单元，其中每个存储器单元包括连接到存储元件的至少一个存储元件和两个门控保险丝。 高电压开关连接到至少一个存储单元并适于切换高电压。

公开(公告)号：US06903993B2

公开(公告)日：2005-06-07

申请号：US10764239

申请日：2004-01-22

Applicant: Douglas D. Smith ,  Myron Buer ,  Laurentiu Vasiliu ,  Bassem Radieddine

Inventor： Douglas D. Smith ,  Myron Buer ,  Laurentiu Vasiliu ,  Bassem Radieddine

IPC: G11C8/16 ,  G11C11/412 ,  G11C11/419 ,  G11C17/16 ,  G11C7/00

CPC classification number: G11C17/18 ,  G11C8/16 ,  G11C11/412 ,  G11C11/419 ,  G11C17/16

Abstract: The present invention relates to a programmable memory device and a method of setting a state for a programmable memory device. In at least one embodiment, the memory device comprises at least a level shifter adapted to stand off a high programing voltage to at least one fuse element in the memory device, wherein the high programming voltage is used to set a state of the memory device.

Abstract translation: 本发明涉及一种可编程存储器件和一种设置可编程存储器件的状态的方法。 在至少一个实施例中，存储器件包括至少一个电平移位器，其适于将高编程电压抵消到存储器件中的至少一个熔丝元件，其中高编程电压用于设置存储器件的状态。

公开(公告)号：US06525955B1

公开(公告)日：2003-02-25

申请号：US10025132

申请日：2001-12-18

Applicant: Douglas D. Smith ,  Myron Buer ,  Laurentiu Vasiliu ,  Bassem Radieddine

Inventor： Douglas D. Smith ,  Myron Buer ,  Laurentiu Vasiliu ,  Bassem Radieddine

IPC: G11C1700

CPC classification number: G11C17/18 ,  G11C8/16 ,  G11C11/412 ,  G11C11/419 ,  G11C17/16

Abstract: The present invention relates to a one-time programmable memory cell and a method of setting a state for a one-time programmable memory cell. The memory cell includes a storage element adapted to store data and two thin gated fuses coupled to the storage element, adapted to set the state of the memory cell. A level shifter device is connected to the gated fuses and is adapted to stand off a high voltage when setting the state of the memory cell. At least one switch transistor is connected to at least the level shifter device and is adapted to select at least one of the gated fuses, enabling a high voltage to be communicated thereto, thus setting the state of the memory cell. A programming device is coupled to the storage element and is adapted to keep at least one of the gated fuses low when setting the state of the memory cell.

Abstract translation: 本发明涉及一次性可编程存储单元和一个可编程存储单元的状态设定方法。 存储单元包括适于存储数据的存储元件和耦合到存储元件的两个薄门控熔丝，适于设置存储单元的状态。 电平移位器装置连接到门控保险丝，并且在设置存储器单元的状态时适于高压放电。 至少一个开关晶体管连接到至少电平移位器装置，并且适于选择门控保险丝中的至少一个，使得能够将高电压传送到其中，从而设置存储器单元的状态。 编程设备耦合到存储元件，并且适于在设置存储器单元的状态时将门控保险丝中的至少一个保持在低电平。

公开(公告)号：US06898103B2

公开(公告)日：2005-05-24

申请号：US10352417

申请日：2003-01-28

Applicant: Douglas D. Smith ,  Myron Buer ,  Laurentiu Vasiliu ,  Bassem Radieddine

Inventor： Douglas D. Smith ,  Myron Buer ,  Laurentiu Vasiliu ,  Bassem Radieddine

IPC: G11C8/16 ,  G11C11/412 ,  G11C11/419 ,  G11C17/16 ,  G11C17/00

CPC classification number: G11C17/18 ,  G11C8/16 ,  G11C11/412 ,  G11C11/419 ,  G11C17/16

Abstract: The present invention relates to a programmable memory cell and a method of setting a state for a programmable memory cell. The memory cell includes two thin gated fuses adapted to set the state of the memory cell. A level shifter device is connected to the gated fuses and is adapted to stand off a high voltage when setting the state of the memory cell. At least one switch transistor is connected to at least the level shifter device and is adapted to select at least one of the gated fuses, enabling a high voltage to be communicated thereto, thus setting the state of the memory cell.

Abstract translation: 本发明涉及一种可编程存储单元和一种设置可编程存储单元的状态的方法。 存储单元包括适于设置存储单元的状态的两个薄门控保险丝。 电平移位器装置连接到门控保险丝，并且在设置存储器单元的状态时适于高压放电。 至少一个开关晶体管连接到至少电平移位器装置，并且适于选择门控保险丝中的至少一个，使得能够将高电压传送到其中，从而设置存储器单元的状态。

公开(公告)号：US06744660B2

公开(公告)日：2004-06-01

申请号：US10418254

申请日：2003-04-17

Applicant: Douglas D. Smith ,  Myron Buer ,  Bassem Radieddine

Inventor： Douglas D. Smith ,  Myron Buer ,  Bassem Radieddine

IPC: G11C1100

CPC classification number: H01L23/5256 ,  G11C17/16 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The present invention relates to a method of setting a state of a one-time programmable memory device having at least one memory cell with a thin gate-ox fuse element having an oxide of about 2.5 nm thick or less using a high voltage switch. The method comprises switching in a high programming voltage into the memory cell using such high voltage switch, setting the state of the thin gate-ox fuse element.

Abstract translation: 本发明涉及一种使用高电压开关来设置具有至少一个存储单元的状态的方法，所述存储单元具有厚度为2.5nm或更小的氧化物的薄栅氧化物熔丝元件。 该方法包括使用这种高电压开关将高编程电压切换到存储器单元中，从而设定薄栅极氧保险丝元件的状态。

公开(公告)号：US20050258482A1

公开(公告)日：2005-11-24

申请号：US11094269

申请日：2005-03-31

Applicant: Akira Ito ,  Douglas Smith ,  Myron Buer

Inventor： Akira Ito ,  Douglas Smith ,  Myron Buer

IPC: H01L21/336 ,  H01L21/8246 ,  H01L23/525 ,  H01L27/112 ,  H01L29/76 ,  H01L29/78

CPC classification number: H01L29/6659 ,  H01L23/5252 ,  H01L27/112 ,  H01L27/11206 ,  H01L29/7836 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

Abstract: An anti-fuse device includes a substrate and laterally spaced source and drain regions formed in the substrate. A channel is formed between the source and drain regions. A gate and gate oxide are formed on the channel and lightly doped source and drain extension regions are formed in the channel. The lightly doped source and drain regions extend across the channel from the source and the drain regions, respectively, occupying a substantial portion of the channel. Programming of the anti-fuse is performed by application of power to the gate and at least one of the source region and the drain region to break-down the gate oxide, which minimizes resistance between the gate and the channel.

Abstract translation: 反熔丝器件包括衬底和形成在衬底中的侧向间隔开的源极和漏极区域。 在源区和漏区之间形成通道。 在通道上形成栅极和栅极氧化物，并且在沟道中形成轻掺杂的源极和漏极延伸区域。 轻掺杂的源极和漏极区域分别从源极和漏极区域延伸穿过沟道，占据通道的主要部分。 通过向栅极和源极区域和漏极区域中的至少一个施加电力来执行反熔丝的编程，以分解栅极氧化物，从而最小化栅极和沟道之间的电阻。

公开(公告)号：US20050091477A1

公开(公告)日：2005-04-28

申请号：US10996140

申请日：2004-11-23

Applicant: Mark Slamowitz ,  Douglas Smith ,  David Knebelsberger ,  Myron Buer

Inventor： Mark Slamowitz ,  Douglas Smith ,  David Knebelsberger ,  Myron Buer

IPC: G11C8/16 ,  G11C11/412 ,  G11C11/419 ,  G06F15/00

CPC classification number: G11C7/02 ,  G11C7/062 ,  G11C7/067 ,  G11C8/16 ,  G11C11/412 ,  G11C11/413 ,  G11C11/419 ,  G11C2207/063

Abstract: The present invention relates to a multi-port register file memory or SRAM including a plurality of storage elements and other circuitry that operate synchronously or asynchronously. The storage elements are arranged in rows and columns and store data. Two read port pairs are coupled to each of the storage elements and a differential sensing device or circuit. The read port is coupled to the storage elements in an isolated manner, enabling a plurality of cells to be arranged in such rows and columns. The sensing device is adapted to sense a small voltage swing. A column mux circuit is coupled to each column and the sensing device. Performance is not degraded unusually as the power supply voltage is reduced due to bus drop or inductive effects.

Abstract translation: 本发明涉及一种多端口寄存器文件存储器或SRAM，它包括多个存储元件和其他同步或异步操作的电路。 存储元素以行和列排列并存储数据。 两个读端口对耦合到每个存储元件和差分感测装置或电路。 读取端口以隔离的方式耦合到存储元件，使得多个单元格能够以这样的行和列排列。 感测装置适于感测小的电压摆幅。 列复用电路耦合到每个列和感测装置。 随着电源电压由于总线掉落或电感效应而降低，性能不会异常降低。