公开(公告)号：US08773179B2

公开(公告)日：2014-07-08

申请号：US13789691

申请日：2013-03-08

Applicant: Etron Technology, Inc.

Inventor： Yi-Hao Chang ,  Shih-Hsing Wang ,  Wen-Tung Yang ,  Yen-An Chang

IPC: H03L7/00 ,  H03K19/00 ,  H03K3/012

CPC classification number: H03K3/012 ,  H03K19/0016

Abstract: An input receiver includes a first input receiving unit, a second input receiving unit, a delay unit, and a first logic unit. The first input receiving unit receives an inverse wake-up signal, an external clock enable signal, a first voltage, and a reference signal, and then generates a first enable signal according to the external clock enable signal and the reference signal. The second input receiving unit receives the external clock enable signal, the first voltage, and an inverse enable voltage, and then generates a second enable signal as its output according to the external clock enable signal. The delay unit generates a wake-up signal according to the second enable signal. The first logic unit receives the wake-up signal and the first enable signal, and then generates an internal clock enable signal according to the wake-up signal and the first enable signal.

Abstract translation: 输入接收机包括第一输入接收单元，第二输入接收单元，延迟单元和第一逻辑单元。 第一输入接收单元接收反向唤醒信号，外部时钟使能信号，第一电压和参考信号，然后根据外部时钟使能信号和参考信号产生第一使能信号。 第二输入接收单元接收外部时钟使能信号，第一电压和反向使能电压，然后根据外部时钟使能信号产生第二使能信号作为其输出。 延迟单元根据第二使能信号产生唤醒信号。 第一逻辑单元接收唤醒信号和第一使能信号，然后根据唤醒信号和第一使能信号产生内部时钟使能信号。

公开(公告)号：US20140075251A1

公开(公告)日：2014-03-13

申请号：US13865206

申请日：2013-04-18

Applicant: ETRON TECHNOLOGY, INC.

Inventor： Shih-Hsing Wang ,  Ming-Cheng Liang ,  Kuo-Cheng Ting

IPC: G11C29/12

CPC classification number: G11C29/12 ,  G11C29/022 ,  G11C29/1201

Abstract: A method capable of improving test coverage of chip pads, where the chip includes a control unit, a plurality of pads, and a storage unit, is disclosed. The storage unit includes a plurality of blocks. The method includes writing test data to a first predetermined block through a predetermined pad of the plurality of pads, controlling a first pad to read and store a predetermined datum of the test data from the first predetermined block, controlling the first pad to write the predetermined datum to a second predetermined block, reading the predetermined datum stored in the second predetermined block through the predetermined pad, and determining whether the first pad is passed.

Abstract translation: 公开了一种能够改善芯片焊盘的测试覆盖范围的方法，其中芯片包括控制单元，多个焊盘和存储单元。 存储单元包括多个块。 该方法包括通过多个焊盘的预定焊盘将测试数据写入第一预定块，控制第一焊盘从第一预定块读取和存储测试数据的预定数据，控制第一焊盘写入预定的 基准到第二预定块，通过预定的焊盘读取存储在第二预定块中的预定数据，并确定第一焊盘是否通过。

公开(公告)号：US09093179B2

公开(公告)日：2015-07-28

申请号：US13865206

申请日：2013-04-18

Applicant: Etron Technology, Inc.

Inventor： Shih-Hsing Wang ,  Ming-Cheng Liang ,  Kuo-Cheng Ting

IPC: G11C29/12 ,  G11C29/02

CPC classification number: G11C29/12 ,  G11C29/022 ,  G11C29/1201

Abstract: A method for improving test coverage of pads of a chip, where the chip includes a control unit, a plurality of pads, and a storage unit, and the storage unit includes a plurality of blocks, includes writing test data to a first predetermined block through a predetermined pad of the plurality of pads, controlling a first pad to read and store a predetermined datum of the test data from the first predetermined block, controlling the first pad to write the predetermined datum to a second predetermined block, reading the predetermined datum stored in the second predetermined block through the predetermined pad, and determining whether the first pad is passed.

Abstract translation: 一种用于提高芯片焊盘测试覆盖范围的方法，其中芯片包括控制单元，多个焊盘和存储单元，并且存储单元包括多个块，包括将测试数据写入第一预定块，通过 多个焊盘中的预定焊盘，控制第一焊盘从第一预定块读取和存储测试数据的预定数据，控制第一焊盘将预定原料写入第二预定块，读取存储的预定数据 在所述第二预定块中通过所述预定焊盘，并且确定所述第一焊盘是否通过。

公开(公告)号：US20130234766A1

公开(公告)日：2013-09-12

申请号：US13789691

申请日：2013-03-08

Applicant: ETRON TECHNOLOGY, INC.

Inventor： Yi-Hao Chang ,  Shih-Hsing Wang ,  Wen-Tung Yang ,  Yen-An Chang

IPC: H03K3/012

CPC classification number: H03K3/012 ,  H03K19/0016

Abstract: An input receiver includes a first input receiving unit, a second input receiving unit, a delay unit, and a first logic unit. The first input receiving unit receives an inverse wake-up signal, an external clock enable signal, a first voltage, and a reference signal, and then generates a first enable signal according to the external clock enable signal and the reference signal. The second input receiving unit receives the external clock enable signal, the first voltage, and an inverse enable voltage, and then generates a second enable signal as its output according to the external clock enable signal. The delay unit generates a wake-up signal according to the second enable signal. The first logic unit receives the wake-up signal and the first enable signal, and then generates an internal clock enable signal according to the wake-up signal and the first enable signal.

Abstract translation: 输入接收机包括第一输入接收单元，第二输入接收单元，延迟单元和第一逻辑单元。 第一输入接收单元接收反向唤醒信号，外部时钟使能信号，第一电压和参考信号，然后根据外部时钟使能信号和参考信号产生第一使能信号。 第二输入接收单元接收外部时钟使能信号，第一电压和反向使能电压，然后根据外部时钟使能信号产生第二使能信号作为其输出。 延迟单元根据第二使能信号产生唤醒信号。 第一逻辑单元接收唤醒信号和第一使能信号，然后根据唤醒信号和第一使能信号产生内部时钟使能信号。