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    PARAMETER SERVER AND METHOD FOR SHARING DISTRIBUTED DEEP LEARNING PARAMETER USING THE SAME
    2.
    发明申请
    PARAMETER SERVER AND METHOD FOR SHARING DISTRIBUTED DEEP LEARNING PARAMETER USING THE SAME 审中-公开

    公开(公告)号：US20180349313A1

    公开(公告)日：2018-12-06

    申请号：US15984262

    申请日：2018-05-18

    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

    Inventor： Shin-Young AHN ,  Eun-Ji LIM ,  Yong-Seok CHOI ,  Young-Choon WOO ,  Wan CHOI

    IPC: G06F15/173 ,  H04L29/08 ,  G06N3/08

    Abstract: Disclosed herein are a parameter server and a method for sharing distributed deep-learning parameters using the parameter server. The method for sharing distributed deep-learning parameters using the parameter server includes initializing a global weight parameter in response to an initialization request by a master process; performing an update by receiving a learned local gradient parameter from the worker process, which performs deep-learning training after updating a local weight parameter using the global weight parameter; accumulating the gradient parameters in response to a request by the master process; and performing an update by receiving the global weight parameter from the master process that calculates the global weight parameter using the accumulated gradient parameters of the one or more worker processes.

    PCI EXPRESS SWITCH AND COMPUTER SYSTEM USING THE SAME
    3.
    发明申请
    PCI EXPRESS SWITCH AND COMPUTER SYSTEM USING THE SAME 审中-公开
    PCI EXPRESS开关和使用它的计算机系统

    公开(公告)号：US20140173167A1

    公开(公告)日：2014-06-19

    申请号：US13958241

    申请日：2013-08-02

    Applicant: Electronics and Telecommunications Research Institute

    Inventor： Yong-Seok CHOI

    IPC: G06F13/40

    CPC classification number: G06F13/4022 ,  G06F12/08 ,  G06F13/20 ,  G06F13/36

    Abstract: Disclosed herein are a PCI Express switch and a computer system using the switch, which do not require a separate switch device for communication between computers, and enable a switch to be mounted in each PCI Express (PCIe) device, thus enabling main memory to be shared between the computers. The PCI Express switch is employed in a computer system, and includes a downstream port for transmitting a packet, and an upstream port for receiving the packet, wherein the downstream port and the upstream port are directly connected to another computer system. The present invention has a structure which enables the memory of other computers to be accessed by changing only the structure of a switch within a computer. Accordingly, there is an advantage in that the memory of other computers can be directly accessed without requiring a separate switch device or complicated software for a connection between computers.

    Abstract translation: 本文公开了一种PCI Express交换机和使用该交换机的计算机系统，其不需要用于计算机之间的通信的单独的交换设备，并且使交换机能够安装在每个PCI Express（PCIe）设备中，从而使主存储器成为 在电脑之间共享。 PCI Express交换机用于计算机系统，包括用于发送分组的下行端口和用于接收分组的上行端口，其中下行端口和上游端口直接连接到另一计算机系统。 本发明具有能够通过仅改变计算机内的开关的结构来访问其他计算机的存储器的结构。 因此，存在其他计算机的存储器可以直接访问而不需要单独的交换设备或用于计算机之间的连接的复杂软件的优点。

    APPARATUS AND METHOD FOR INTERFACING BETWEEN CENTRAL PROCESSING UNIT AND MAIN MEMORY UNIT
    6.
    发明申请
    APPARATUS AND METHOD FOR INTERFACING BETWEEN CENTRAL PROCESSING UNIT AND MAIN MEMORY UNIT 有权
    中央处理单元和主存储单元之间接口的装置和方法

    公开(公告)号：US20150180574A1

    公开(公告)日：2015-06-25

    申请号：US14551826

    申请日：2014-11-24

    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

    Inventor： Yong-Seok CHOI ,  Hyuk-Je KWON ,  Gyung-Ock KIM

    IPC: H04B10/2575

    CPC classification number: H04B10/801

    Abstract: Disclosed are an apparatus and method for interfacing between a central processing unit (CPU) and a main memory unit, whereby a shared cache memory unit and the main memory unit are connected to each other using one optical signal transmission line. The apparatus for interfacing between the CPU and the main memory unit includes: a master optical connection protocol engine, converting operation control signals received from a shared cache memory unit of the CPU into serial signals; a first electrical-to-optical (E/O) converter, converting the serial signals converted by the master optical connection protocol engine into optical signals; a second E/O converter, converting the optical signals converted by the first E/O converter into serial signals; a slave optical connection protocol engine, converting the serial signals converted by the second E/O converter into operation control signals; and a memory controller having access to the main memory unit.

    Abstract translation: 公开了一种用于在中央处理单元（CPU）和主存储单元之间进行接口的装置和方法，由此共享高速缓冲存储器单元和主存储器单元使用一个光信号传输线相互连接。 用于在CPU和主存储器单元之间进行接口的装置包括：主光连接协议引擎，将从CPU的共享高速缓冲存储器单元接收的操作控制信号转换为串行信号; 第一电光转换器，将由主光连接协议引擎转换的串行信号转换为光信号; 第二E / O转换器，将由第一E / O转换器转换的光信号转换为串行信号; 从属光连接协议引擎，将由第二E / O转换器转换的串行信号转换成操作控制信号; 以及具有访问主存储器单元的存储器控​​制器。

    PCIE SWITCH APPARATUS AND METHOD OF CONTROLLING CONNECTION THEREOF
    7.
    发明申请
    PCIE SWITCH APPARATUS AND METHOD OF CONTROLLING CONNECTION THEREOF 有权
    PCIE开关装置及其控制方法

    公开(公告)号：US20130268713A1

    公开(公告)日：2013-10-10

    申请号：US13837566

    申请日：2013-03-15

    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

    Inventor： Yong-Seok CHOI

    IPC: G06F13/40

    CPC classification number: G06F13/4022

    Abstract: The present invention relates to a PCIe switch apparatus and a method of controlling the connection thereof. The PCIe switch apparatus includes a PCIe photoconversion unit for converting an electrical signal input from a local host into packet data and converting the converted packet data into an optical signal. A PCIe slot board unit reconverts the optical signal into the packet data, reconverts the packet data into the electrical signal, and outputs the electrical signal to a PCIe-based device. An optical cable connects the PCIe photoconversion unit and the PCIe slot board unit to each other. The PCIe switch apparatus controls a long-distance communication interface between the local host and the PCIe-based device.

    Abstract translation: 本发明涉及一种PCIe开关装置及其连接方法。 PCIe开关装置包括PCIe光电转换单元，用于将从本地主机输入的电信号转换为分组数据，并将转换的分组数据转换为光信号。 PCIe插槽板单元将光信号转换为分组数据，将分组数据重新转换为电信号，并将电信号输出到基于PCIe的设备。 光缆将PCIe光电转换单元和PCIe插槽板单元彼此连接。 PCIe交换机控制本地主机和基于PCIe的设备之间的长距离通信接口。

    SATA HOST BUS ADAPTER USING OPTICAL SIGNAL AND METHOD FOR CONNECTING SATA STORAGE USING THE SAME
    8.
    发明申请
    SATA HOST BUS ADAPTER USING OPTICAL SIGNAL AND METHOD FOR CONNECTING SATA STORAGE USING THE SAME 有权
    使用光信号的SATA HOST总线适配器和使用其连接SATA存储的方法

    公开(公告)号：US20160365924A1

    公开(公告)日：2016-12-15

    申请号：US15066008

    申请日：2016-03-10

    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

    Inventor： Yong-Seok CHOI ,  Hyuk-Je KWON

    IPC: H04B10/25

    CPC classification number: H04B10/25 ,  G06F13/385 ,  H04B10/5161 ,  H04B10/801

    Abstract: Disclosed herein are a SATA host bus adapter using a optical signal and a method for connecting SATA storage using the optical signal. The SATA host bus adapter includes: a first conversion unit for converting a PCI-Express signal, transmitted from a host computer, into a data signal, using a protocol defined in a bus; a optical signal conversion unit for converting the data signal into a optical signal and for transmitting the optical signal to a optical signal reception unit; and a second conversion unit for converting the optical signal, received by the optical signal reception unit, into the data signal, for converting the data signal into a SATA signal, using the protocol, and for transmitting the SATA signal to the SATA storage.

    Abstract translation: 这里公开了使用光信号的SATA主机总线适配器和使用光信号连接SATA存储器的方法。 SATA主机总线适配器包括：第一转换单元，用于使用总线中定义的协议将从主计算机发送的PCI-Express信号转换成数据信号; 光信号转换单元，用于将数据信号转换成光信号，并将光信号发送到光信号接收单元; 以及第二转换单元，用于将由光信号接收单元接收的光信号转换成数据信号，用于使用该协议将数据信号转换成SATA信号，并将SATA信号发送到SATA存储器。

    WIDEBAND RF RECEIVER
    9.
    发明申请
    WIDEBAND RF RECEIVER 审中-公开
    宽带射频接收器

    公开(公告)号：US20150171976A1

    公开(公告)日：2015-06-18

    申请号：US14217714

    申请日：2014-03-18

    Applicant: Electronics and Telecommunications Research Institute

    Inventor： Sang Tae KIM ,  Haeng Sook RO ,  Gwangmoon PARK ,  Seong Yun LEE ,  Mi-Kyung SUK ,  Yong-Seok CHOI

    IPC: H04B17/00 ,  H04B1/16

    CPC classification number: H04B17/12 ,  H04B1/1027

    Abstract: A wideband RF receiver includes a dual mode antenna configured to drive in an active antenna mode when a bias power is supplied thereto and to drive in a passive antenna mode when a power is not supplied thereto; and a hybrid interface apparatus configured to supply the bias power to the dual mode antenna and configured to provide a control signal that enables the dual mode antenna to drive in the active antenna mode or the passive antenna mode. Further, the wideband RF receiver includes a radio measuring and receiving apparatus configured to measure a signal level of an input value that the hybrid interface apparatus outputs the control signal.

    Abstract translation: 宽带RF接收机包括双模式天线，其配置为当向其提供偏置功率时以有源天线模式驱动并且当不向其提供电力时以无源天线模式驱动; 以及混合接口装置，被配置为将所述偏置功率提供给所述双模式天线，并且被配置为提供使所述双模式天线能够以所述有源天线模式或所述无源天线模式驱动的控制信号。 此外，宽带RF接收机包括被配置为测量混合接口装置输出控制信号的输入值的信号电平的无线电测量和接收装置。

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