Integrated circuit using a power supply input for digital logic
    1.
    发明授权
    Integrated circuit using a power supply input for digital logic 失效
    集成电路使用数字逻辑电源输入

    公开(公告)号:US6115595A

    公开(公告)日:2000-09-05

    申请号:US71977

    申请日:1998-05-04

    IPC分类号: H04B1/28

    CPC分类号: H04B1/28 G01S19/34 G01S19/32

    摘要: A GPS receiver including an RF GPS integrated circuit downconverter having a standby mode controlled by a power supply input used as a logic signal. The RF GPS integrated circuit includes a synthesizer for generating LO signals, first and second downconverters for using the LO signals for downconverting the GPS signal, and a sampler for using a clock signal for providing in-phase and quadrature phase sampled output signals representative of the GPS signal. The synthesizer includes a multi-mode divider for providing substantially the same first LO frequency at about the midpoint of the L1 and L2 GPS frequencies when either of an external or internally generated reference frequency is selected. A GPS digital signal processor integrated circuit issues the logic signal and the clock signal from a single pin.

    摘要翻译: 一种GPS接收机,包括具有由用作逻辑信号的电源输入控制的待机模式的RF GPS集成电路下变频器。 RF GPS集成电路包括用于产生LO信号的合成器,用于使用LO信号进行下变频的GPS信号的第一和第二下变频器,以及用于使用时钟信号的采样器,用于提供表示该信号的同相和正交相位采样的输出信号 GPS信号。 合成器包括多模式分频器,用于当选择外部或内部产生的参考频率时,在L1和L2 GPS频率的中点附近提供基本相同的第一LO频率。 GPS数字信号处理器集成电路从单个引脚发出逻辑信号和时钟信号。

    GPS receiver having a rapid acquisition of GPS satellite signals
    2.
    发明授权
    GPS receiver having a rapid acquisition of GPS satellite signals 失效
    具有快速获取GPS卫星信号的GPS接收机

    公开(公告)号:US5594453A

    公开(公告)日:1997-01-14

    申请号:US332958

    申请日:1994-11-01

    IPC分类号: G01S1/00 G01S5/02

    CPC分类号: G01S19/235 G01S19/34

    摘要: A GPS receiver having a rapid acquisition of a GPS satellite signal when a normal operational mode is entered after a low power standby mode. The GPS receiver includes an RF section for receiving the GPS satellite signal and providing an GPS IF signal, a correlator section for providing a correlation signal for the correlation between the GPS IF signal and a GPS replica signal, and a microprocessor section for receiving the correlation signal and calculating a geographical location of the GPS receiver. The GPS replica signal is based upon a reference frequency from a reference oscillator and a reference time from a timer. In the standby mode, the operation of the RF section, correlator section, and microprocessor section is inhibited while the reference oscillator and time continue to operate. In order to increase acquisition speed upon entering the normal mode, the microprocessor section provides the correlator section with an initial frequency adjustment to correct for drift in the reference frequency during the standby mode. The microprocessor section provides the initial frequency adjustment based upon a learned frequency correction that is based upon the frequency adjustment that results in acquisition of the GPS satellite signal after alternating one or more times between the standby mode and the normal mode. Alternately, the initial frequency adjustment is calculated from a stored frequency/temperature relationship and a temperature for the reference oscillator measured by a temperature sensor.

    摘要翻译: 当在低功率待机模式之后进入正常操作模式时,具有快速获取GPS卫星信号的GPS接收机。 GPS接收机包括用于接收GPS卫星信号并提供GPS IF信号的RF部分,用于提供GPS IF信号与GPS复制信号之间的相关性的相关信号的相关器部分和用于接收相关性的微处理器部分 信号并计算GPS接收机的地理位置。 GPS复制信号基于来自参考振荡器的参考频率和来自定时器的参考时间。 在待机模式下,当参考振荡器和时间继续工作时,禁止RF部分,相关器部分和微处理器部分的操作。 为了在进入正常模式时提高采集速度,微处理器部分为相关器部分提供初始频率调整,以在待机模式期间校正参考频率中的漂移。 微处理器部分基于在待机模式和正常模式之间交替一次或多次之后基于进行GPS卫星信号获取的频率调整的学习频率校正来提供初始频率调整。 或者,初始频率调整是由存储的频率/温度关系和由温度传感器测量的基准振荡器的温度计算的。

    RF integrated circuit for downconverting a GPS signal
    3.
    发明授权
    RF integrated circuit for downconverting a GPS signal 失效
    RF集成电路,用于下变频GPS信号

    公开(公告)号:US06356602B1

    公开(公告)日:2002-03-12

    申请号:US09073207

    申请日:1998-05-04

    IPC分类号: H04L2706

    摘要: A GPS receiver and an RF GPS integrated circuit for receiving a GPS signal. The GPS integrated circuit includes a synthesizer for generating LO signals, first and second downconverters for using the LO signals for downconverting the GPS signal, and a sampler for providing in-phase and quadrature phase sampled output signals representative of the GPS signal. The synthesizer includes a multi-mode divider for providing substantially the same first LO frequency at about the midpoint of the L1 and L2 GPS lo frequencies for either of two reference frequencies. The RF GPS integrated circuit uses an entirely on-chip voltage controlled oscillator (VCO) having a resonator for generating the LO signals and an entirely on-chip filter for filtering a first intermediate frequency signal.

    摘要翻译: GPS接收机和用于接收GPS信号的RF GPS集成电路。 GPS集成电路包括用于产生LO信号的合成器,用于使用LO信号进行下变频的GPS信号的第一和第二下变频器,以及用于提供表示GPS信号的同相和正交相位采样的输出信号的采样器。 合成器包括多模式分频器,用于在两个参考频率中的任一个的L1和L2 GPS lo频率的中点附近提供基本相同的第一LO频率。 RF GPS集成电路使用具有用于产生LO信号的谐振器的完全片上压控振荡器(VCO)和用于滤波第一中频信号的完全片上滤波器。

    GSM cellular telephone and GPS receiver combination
    4.
    发明授权
    GSM cellular telephone and GPS receiver combination 失效
    GSM蜂窝电话和GPS接收机组合

    公开(公告)号:US6122506A

    公开(公告)日:2000-09-19

    申请号:US72295

    申请日:1998-05-04

    摘要: A GPS/GSM receiver combination for receiving GSM and GPS signals using an RF GPS integrated circuit for downconverting the GPS signal. The GPS integrated circuit includes a synthesizer for generating LO signals, first and second downconverters for using the LO signals for downconverting the GPS signal, and a sampler for providing in-phase and quadrature phase sampled output signals representative of the GPS signal. The synthesizer includes a multi-mode divider for providing substantially the same first LO frequency at about the midpoint of the L1 and L2 GPS frequencies when either of a standard GSM reference frequency or historically common GPS reference frequency is selected. A standby mode in the integrated circuit is controlled by a power logic circuit using a power supply input as a logic control signal. The GSM/GPS receiver combination includes a GSM reference oscillator and a microprocessor system including a GSM frequency correction code for correcting the GSM reference frequency based upon a frequency correction beacon (FCB) signal received in the GSM signal. The GSM-based correction is then used for correcting the GSM reference frequency in order to center a frequency search for acquiring the GPS signal.

    摘要翻译: GPS / GSM接收机组合,用于使用RF GPS集成电路接收GSM和GPS信号,用于下变频GPS信号。 GPS集成电路包括用于产生LO信号的合成器,用于使用LO信号进行下变频的GPS信号的第一和第二下变频器,以及用于提供表示GPS信号的同相和正交相位采样的输出信号的采样器。 合成器包括多模式分频器,用于当选择标准GSM参考频率或历史上常见的GPS参考频率之一时,在L1和L2 GPS频率的中点附近提供基本上相同的第一LO频率。 集成电路中的待机模式由使用电源输入作为逻辑控制信号的电源逻辑电路来控制。 GSM / GPS接收机组合包括GSM参考振荡器和包括GSM频率校正码的微处理器系统,用于基于在GSM信号中接收到的频率校正信标(FCB)信号来校正GSM参考频率。 然后,基于GSM的校正用于校正GSM参考频率,以便中心用于获取GPS信号的频率搜索。

    Ultra low-power integrated circuit for pseudo-baseband down-conversion
of GPS RF signals
    5.
    发明授权
    Ultra low-power integrated circuit for pseudo-baseband down-conversion of GPS RF signals 失效
    用于GPS射频信号的伪基带下转换的超低功耗集成电路

    公开(公告)号:US5564098A

    公开(公告)日:1996-10-08

    申请号:US305356

    申请日:1994-09-13

    IPC分类号: G01S1/00 H03D7/16 H04B1/26

    CPC分类号: G01S19/37 H03D7/16 H04B1/26

    摘要: A GPS receiver downconverter combines on a single integrated circuit, a first super-heterodyne mixer, a voltage controlled oscillator, a phase locked loop, a pair of quadrature mixers and a pair of quantizers with in-phase and quadrature-phase sampler outputs operable at twenty-five MHz and 2.5 MHz. Emitter-coupled logic and special low-voltage bipolar semiconductor technology are combined for 3.3 volt operation at under one hundred milliwatts.

    摘要翻译: GPS接收机下变频器组合在单个集成电路,第一超外差混频器,压控振荡器,锁相环,一对正交混频器和一对具有同相和正交相位采样器输出的量化器,可在 二十五MHz和2.5 MHz。 发射极耦合逻辑和特殊低压双极半导体技术在一百毫瓦以下组合3.3伏工作。

    Voltage controlled oscillator suitable for complete implementation
within a semiconductor integrated circuit
    6.
    发明授权
    Voltage controlled oscillator suitable for complete implementation within a semiconductor integrated circuit 失效
    压控振荡器适用于半导体集成电路内的完全实现

    公开(公告)号:US5187450A

    公开(公告)日:1993-02-16

    申请号:US851195

    申请日:1992-03-13

    摘要: An embodiment of the present invention is a voltage controlled oscillator (VCO) comprised of a differential pair of transistors that have respective positive feedback paths with phase-lead networks cross-coupled. Each positive feedback path on each side has two different phase-lead branches. The two phase-lead branches have the same phase differences on each side of the differential pair, in order to maintain a symmetry that improves common-mode noise rejection on a voltage control differential input. Current-steering is used to control the mixture of currents that arrive at the bases of the differential transistor pair from the respective two different phase-lead branches, and thereby changing the frequency of the VCO.

    摘要翻译: 本发明的一个实施例是一种压控振荡器(VCO),其包括具有相互正交馈耦合的相互正反馈路径的差分对晶体管。 每侧的每个正反馈路径都有两个不同的相位导线分支。 两个相位引导分支在差分对的每一侧具有相同的相位差,以便保持改善电压控制差分输入上的共模噪声抑制的对称性。 电流转向用于控制从相应的两个不同相位 - 引线分支到达差分晶体管对的基极的电流混合,从而改变VCO的频率。

    GPS receiver having an initial adjustment for correcting for drift in
reference frequency
    7.
    发明授权
    GPS receiver having an initial adjustment for correcting for drift in reference frequency 失效
    GPS接收机具有用于校正参考频率漂移的初始调整

    公开(公告)号:US5629708A

    公开(公告)日:1997-05-13

    申请号:US634612

    申请日:1996-04-18

    IPC分类号: G01S1/00 G01S5/02

    CPC分类号: G01S19/235 G01S19/34

    摘要: A GPS receiver having a rapid acquisition of a GPS satellite signal when a normal operational mode is entered after a low power standby mode. The GPS receiver includes an RF section for receiving the GPS satellite signal and providing an GPS IF signal, a correlator section for providing a correlation signal for the correlation between the GPS IF signal and an internally generated replica signal, and a microprocessor section for receiving the correlation signal and calculating a geographical location of the GPS receiver. The replica signal is based upon a reference frequency from a reference oscillator and a reference time of arrival (TOA) from a timer. In order to increase acquisition speed, the microprocessor section provides the correlator section with an initial frequency adjustment and an initial TOA adjustment to correct for drift in the reference frequency during the standby mode. The initial adjustments are based upon a learned corrections to the initial adjustments that result in acquisition of the GPS satellite signal after alternating one or more times between the standby mode and the normal mode or from stored temperature relationships and measured temperatures of the reference oscillator.

    摘要翻译: 当在低功率待机模式之后进入正常操作模式时,具有快速获取GPS卫星信号的GPS接收机。 GPS接收机包括用于接收GPS卫星信号并提供GPS IF信号的RF部分,用于提供用于GPS IF信号与内部生成的副本信号之间的相关性的相关信号的相关器部分和用于接收 相关信号并计算GPS接收机的地理位置。 复制信号基于来自参考振荡器的参考频率和来自定时器的参考到达时间(TOA)。 为了提高采集速度,微处理器部分为相关器部分提供初始频率调整和初始TOA调整,以在待机模式期间校正参考频率中的漂移。 初始调整基于对在待机模式和正常模式之间交替一次或多次之后或从存储的温度关系和参考振荡器的测量温度交替导致获取GPS卫星信号的初始调整的学习校正。

    GPS receiver having a low power standby mode
    8.
    发明授权
    GPS receiver having a low power standby mode 失效
    具有低功率待机模式的GPS接收机

    公开(公告)号:US5592173A

    公开(公告)日:1997-01-07

    申请号:US276886

    申请日:1994-07-18

    摘要: A GPS receiver having a normal mode to receive GPS satellite signals and to provide location information, and a low power standby mode. A microprocessor system in the GPS receiver causes the GPS receiver to alternate between the normal mode and the low power standby mode in order to reduce the average power consumption in the GPS receiver. In the normal mode a GPS antenna receives GPS satellite signals, the GPS frequency downconverter converts the frequency of the GPS satellite signals to an intermediate frequency, a digital signal processing system processes the intermediate frequency to provide GPS satellite signal correlation information. The microprocessor system processes the correlation information and provides location information to a user. In the standby mode, the operating power is inhibited in the GPS antenna and the GPS frequency downconverter, the system clock is inhibited in the digital processing system, and the microprocessor clock is inhibited in the microprocessor system.

    摘要翻译: 具有正常模式以接收GPS卫星信号并提供位置信息的GPS接收机以及低功率待机模式。 GPS接收机中的微处理器系统使得GPS接收机在正常模式和低功率待机模式之间交替,以便降低GPS接收机中的平均功耗。 在正常模式下,GPS天线接收GPS卫星信号,GPS下变频器将GPS卫星信号的频率转换为中频,数字信号处理系统处理中频提供GPS卫星信号相关信息。 微处理器系统处理相关信息并向用户提供位置信息。 在待机模式下,在GPS天线和GPS下变频器中禁止工作电源,在数字处理系统中禁止系统时钟,微处理器系统中的微处理器时钟被禁止。

    AC-coupled single-ended or differential-input radio frequency amplifier
integrated circuit
    9.
    发明授权
    AC-coupled single-ended or differential-input radio frequency amplifier integrated circuit 失效
    交流耦合单端或差分输入射频放大器集成电路

    公开(公告)号:US5365192A

    公开(公告)日:1994-11-15

    申请号:US105026

    申请日:1993-08-11

    IPC分类号: H03F3/19 H03F3/45

    摘要: An embodiment of the present invention combines, on a single integrated circuit, a first bipolar transistor in a common-emitter configuration capacitively coupled to a second bipolar transistor in a common-base configuration, together with a capacitive input coupling for a single-ended input and directly-coupled collector outputs for a differential-output for driving successive differential-input and differential-output emitter-coupled transistor pairs for multiple stages of amplifier gain.

    摘要翻译: 本发明的一个实施例在单个集成电路上组合以共共基极配置电容耦合到第二双极晶体管的共发射极配置中的第一双极晶体管,以及用于单端输入的电容输入耦合 和用于差分输出的直接耦合集电极输出,用于驱动多级放大器增益的连续差分输入和差分输出发射极耦合晶体管对。

    Integrated phase locked loop local oscillator
    10.
    发明授权
    Integrated phase locked loop local oscillator 失效
    集成锁相环本地振荡器

    公开(公告)号:US5311149A

    公开(公告)日:1994-05-10

    申请号:US30678

    申请日:1993-03-12

    CPC分类号: H03D7/163 H03L7/08 H04B1/28

    摘要: An embodiment of the present invention is a single-chip GPS receiver front-end comprising a radio frequency amplifier, a voltage-controlled oscillator operating at a first local oscillator frequency, a divide by seven and one-half counter for deriving a second local oscillator frequency from the first and a first and second mixer. The local oscillator frequency is mid-way between two carrier frequencies of interest that may be received by the radio frequency amplifier and the first mixer produces a first intermediate frequency. The second local oscillator frequency is then beat with the first intermediate frequency in the second mixer to produce a second intermediate frequency. A dual-conversion super heterodyne configuration is therefore employed in which the first and second local oscillator frequencies are derived from a single oscillator and the first local oscillator frequency is seven and one-half times the second local oscillator frequency.

    摘要翻译: 本发明的一个实施例是一种单芯片GPS接收器前端,其包括射频放大器,以第一本地振荡器频率工作的压控振荡器,除以七和一半计数器,用于导出第二本地振荡器 频率从第一和第一和第二混合器。 本地振荡器频率是可以由射频放大器接收的两个感兴趣载波频率之间的中间,并且第一混频器产生第一中间频率。 然后在第二混频器中以第一中间频率击打第二本地振荡器频率以产生第二中频。 因此,采用双转换超外差配置,其中第一和第二本地振荡器频率从单个振荡器导出,并且第一本地振荡器频率是第二本地振荡器频率的七倍和二分之一倍。