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公开(公告)号：US20090101887A1
公开(公告)日：2009-04-23
申请号：US11876787
申请日：2007-10-23
IPC分类号： H01L29/12 , H01L21/329
CPC分类号： H01L29/93 , H01L29/155 , H01L29/165
摘要： Methods and heterostructure barrier varactor (HBV) diodes optimized for application with frequency multipliers at providing outputs at submillimeter wave frequencies and above. The HBV diodes include a silicon-containing substrate, an electrode over the silicon-containing substrate, and one or more heterojunction quantum wells of alternating layers of Si and SiGe of one or more electrodes of the diode. Each SiGe quantum well preferably has a floating SiGe layer between adjacent SiGe gradients followed by adjacent Si layers, such that, a single homogeneous structure is provided characterized by having no distinct separations. The plurality of Si/SiGe heterojunction quantum wells may be symmetric or asymmetric.
摘要翻译： 优化的方法和异质结构屏障变容二极管（HBV）二极管，用于在亚毫米波频率及以上提供输出的频率乘法器。 HBV二极管包括含硅衬底，位于含硅衬底上的电极以及二极管的一个或多个电极的Si和SiGe的交替层的一个或多个异质结量子阱。 每个SiGe量子阱优选地在相邻SiGe梯度之间具有相邻SiGe梯度之间的浮动SiGe层，随后是相邻的Si层，使得提供单一的均匀结构，其特征在于没有明显的分离。 多个Si / SiGe异质结量子阱可以是对称的或不对称的。
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公开(公告)号：US20100093148A1
公开(公告)日：2010-04-15
申请号：US12640498
申请日：2009-12-17
IPC分类号： H01L21/329
CPC分类号： H01L29/93 , H01L29/155 , H01L29/165
摘要： Methods and heterostructure barrier varactor (HBV) diodes optimized for application with frequency multipliers at providing outputs at submillimeter wave frequencies and above. The HBV diodes include a silicon-containing substrate, an electrode over the silicon-containing substrate, and one or more heterojunction quantum wells of alternating layers of Si and SiGe of one or more electrodes of the diode. Each SiGe quantum well preferably has a floating SiGe layer between adjacent SiGe gradients followed by adjacent Si layers, such that, a single homogeneous structure is provided characterized by having no distinct separations. The plurality of Si/SiGe heterojunction quantum wells may be symmetric or asymmetric.
摘要翻译： 优化的方法和异质结构屏障变容二极管（HBV）二极管，用于在亚毫米波频率及以上提供输出的频率乘法器。 HBV二极管包括含硅衬底，位于含硅衬底上的电极以及二极管的一个或多个电极的Si和SiGe的交替层的一个或多个异质结量子阱。 每个SiGe量子阱优选地在相邻SiGe梯度之间具有相邻SiGe梯度之间的浮动SiGe层，随后是相邻的Si层，使得提供单一的均匀结构，其特征在于没有明显的分离。 多个Si / SiGe异质结量子阱可以是对称的或非对称的。
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公开(公告)号：US07696604B2
公开(公告)日：2010-04-13
申请号：US11876787
申请日：2007-10-23
IPC分类号： H01L29/93 , H01L27/108 , H01L29/76 , H01L29/94 , H01L31/119
CPC分类号： H01L29/93 , H01L29/155 , H01L29/165
摘要： Methods and heterostructure barrier varactor (HBV) diodes optimized for application with frequency multipliers at providing outputs at submillimeter wave frequencies and above. The HBV diodes include a silicon-containing substrate, an electrode over the silicon-containing substrate, and one or more heterojunction quantum wells of alternating layers of Si and SiGe of one or more electrodes of the diode. Each SiGe quantum well preferably has a floating SiGe layer between adjacent SiGe gradients followed by adjacent Si layers, such that, a single homogeneous structure is provided characterized by having no distinct separations. The plurality of Si/SiGe heterojunction quantum wells may be symmetric or asymmetric.
摘要翻译： 优化的方法和异质结构屏障变容二极管（HBV）二极管，用于在亚毫米波频率及以上提供输出的频率乘法器。 HBV二极管包括含硅衬底，位于含硅衬底上的电极以及二极管的一个或多个电极的Si和SiGe的交替层的一个或多个异质结量子阱。 每个SiGe量子阱优选地在相邻SiGe梯度之间具有相邻SiGe梯度之间的浮动SiGe层，随后是相邻的Si层，使得提供单一的均匀结构，其特征在于没有明显的分离。 多个Si / SiGe异质结量子阱可以是对称的或不对称的。
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4.发明授权Methods of fabricating a bipolar junction transistor with a self-aligned emitter and base 有权制造具有自对准发射极和基极的双极结型晶体管的方法公开(公告)号：US08492237B2
公开(公告)日：2013-07-23
申请号：US13042902
申请日：2011-03-08
申请人： Kevin K. Chan , Erik M. Dahlstrom , Peter B. Gray , David L. Harame , Qizhi Liu
发明人： Kevin K. Chan , Erik M. Dahlstrom , Peter B. Gray , David L. Harame , Qizhi Liu
IPC分类号： H01L21/8222
CPC分类号： H01L29/73 , H01L21/28518 , H01L29/0821 , H01L29/66272 , H01L29/732 , H01L29/7378
摘要： Methods for fabricating bipolar junction transistors with self-aligned emitter and extrinsic base, bipolar junction transistors made by the methods, and design structures for a BiCMOS integrated circuit. The bipolar junction transistor is fabricated using a sacrificial emitter pedestal that provides a sacrificial mandrel promoting self-alignment between the emitter and the extrinsic base. The sacrificial emitter pedestal is subsequently removed to open an emitter window extending to the intrinsic base. An emitter is formed in the emitter window that lands on the intrinsic base.
摘要翻译： 用于制造具有自对准发射极和非本征基极的双极结型晶体管的方法，通过该方法制造的双极结型晶体管以及用于BiCMOS集成电路的设计结构。 使用牺牲发射器基座制造双极结型晶体管，该牺牲发射器基座提供牺牲的心轴，以促进发射极和外部基极之间的自对准。 随后去除牺牲发射器基座以打开延伸到本征基底的发射器窗口。 在发射器窗口中形成发射极，其位于本征基极上。
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公开(公告)号：US20120126292A1
公开(公告)日：2012-05-24
申请号：US12951516
申请日：2010-11-22
申请人： Erik M. Dahlstrom , Peter B. Gray , Qizhi Liu
发明人： Erik M. Dahlstrom , Peter B. Gray , Qizhi Liu
IPC分类号： H01L29/737 , G06F9/45 , H01L21/331
CPC分类号： H01L29/7378 , H01L29/66242
摘要： Heterojunction bipolar transistors with reduced base resistance, as well as fabrication methods for heterojunction bipolar transistors and design structures for BiCMOS integrated circuits. The heterojunction bipolar transistor includes a conductive layer between the intrinsic base and the extrinsic base. The conductive layer is comprised of a conductive material, such as a silicide, having a lower resistivity than the materials forming the intrinsic base and the extrinsic base.
摘要翻译： 具有降低的基极电阻的异质结双极晶体管，以及用于BiCMOS集成电路的异质结双极晶体管和设计结构的制造方法。 异质结双极晶体管包括在本征基极和外部基极之间的导电层。 导电层由诸如硅化物的导电材料构成，其电阻率低于形成本征碱和非本征基的材料。
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6.发明申请公开(公告)号：US20120112244A1
公开(公告)日：2012-05-10
申请号：US12939668
申请日：2010-11-04
IPC分类号： H01L29/737 , G06F17/50 , H01L21/331
CPC分类号： H01L29/7375 , H01L29/0817 , H01L29/1004 , H01L29/66242
摘要： Vertical heterojunction bipolar transistors with reduced base-collector junction capacitance, as well as fabrication methods for vertical heterojunction bipolar transistors and design structures for BiCMOS integrated circuits. The vertical heterojunction bipolar transistor includes a barrier layer between the intrinsic base and the extrinsic base that blocks or reduces diffusion of a dopant from the extrinsic base to the intrinsic base. The barrier layer has at least one opening that permits direct contact between the intrinsic base and a portion of the extrinsic base disposed in the opening.
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公开(公告)号：US08586423B2
公开(公告)日：2013-11-19
申请号：US13168232
申请日：2011-06-24
申请人： Renata Camillo-Castillo , Erik M. Dahlstrom , Robert J. Gauthier, Jr. , Ephrem G. Gebreselasie , Richard A. Phelps , Yun Shi , Andreas Stricker
发明人： Renata Camillo-Castillo , Erik M. Dahlstrom , Robert J. Gauthier, Jr. , Ephrem G. Gebreselasie , Richard A. Phelps , Yun Shi , Andreas Stricker
IPC分类号： H01L21/02
CPC分类号： H01L29/7315 , G06F17/5063 , H01L27/0262 , H01L29/66393 , H01L29/7436
摘要： Device structures, fabrication methods, operating methods, and design structures for a silicon controlled rectifier. The method includes applying a mechanical stress to a region of a silicon controlled rectifier (SCR) at a level sufficient to modulate a trigger current of the SCR. The device and design structures include a SCR with an anode, a cathode, a first region, and a second region of opposite conductivity type to the first region. The first and second regions of the SCR are disposed in a current-carrying path between the anode and cathode of the SCR. A layer is positioned on a top surface of a semiconductor substrate relative to the first region and configured to cause a mechanical stress in the first region of the SCR at a level sufficient to modulate a trigger current of the SCR.
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8.发明授权公开(公告)号：US08232156B2
公开(公告)日：2012-07-31
申请号：US12939668
申请日：2010-11-04
IPC分类号： H01L21/331
CPC分类号： H01L29/7375 , H01L29/0817 , H01L29/1004 , H01L29/66242
摘要： Vertical heterojunction bipolar transistors with reduced base-collector junction capacitance, as well as fabrication methods for vertical heterojunction bipolar transistors and design structures for BiCMOS integrated circuits. The vertical heterojunction bipolar transistor includes a barrier layer between the intrinsic base and the extrinsic base that blocks or reduces diffusion of a dopant from the extrinsic base to the intrinsic base. The barrier layer has at least one opening that permits direct contact between the intrinsic base and a portion of the extrinsic base disposed in the opening.
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公开(公告)号：US20080204068A1
公开(公告)日：2008-08-28
申请号：US11680283
申请日：2007-02-28
IPC分类号： G01R31/26
CPC分类号： G01R31/2894
摘要： A method for testing bipolar transistors in an integrated circuit includes first measuring first conductances of leakage paths between collectors and emitters of a first plurality of bipolar transistors with a known number of defects, calculating a per defect conductance value using the measured first conductances and the known number of defects to derive the linear relation. The method then measures second conductances of leakage path between collectors and emitters of a second plurality of bipolar transistors under test and having an unknown number of defects. Using the measured leakage path current from the second conductances and the linear relation, the number of defects related to the second plurality of bipolar transistors under test may be accurately determined.
摘要翻译： 用于测试集成电路中的双极晶体管的方法包括：首先测量具有已知数量缺陷的第一多个双极晶体管的集电极和发射极之间的漏电路径的第一电导，使用所测量的第一电导和已知的第一电导计算每个缺陷电导值 导出线性关系的缺陷数。 该方法然后测量第二组多个待测双极晶体管的集电极和发射极之间的泄漏路径的第二电导，并具有未知数量的缺陷。 使用来自第二电导的测量的泄漏路径电流和线性关系，可以准确地确定与被测试的第二多个双极晶体管相关的缺陷的数量。
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公开(公告)号：US08389372B2
公开(公告)日：2013-03-05
申请号：US12951516
申请日：2010-11-22
申请人： Erik M. Dahlstrom , Peter B. Gray , Qizhi Liu
发明人： Erik M. Dahlstrom , Peter B. Gray , Qizhi Liu
IPC分类号： H01L21/331 , H01L21/8222
CPC分类号： H01L29/7378 , H01L29/66242
摘要： Heterojunction bipolar transistors with reduced base resistance, as well as fabrication methods for heterojunction bipolar transistors and design structures for BiCMOS integrated circuits. The heterojunction bipolar transistor includes a conductive layer between the intrinsic base and the extrinsic base. The conductive layer is comprised of a conductive material, such as a silicide, having a lower resistivity than the materials forming the intrinsic base and the extrinsic base.
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