利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

22 条记录 (耗时 0.034 秒)

    Bipolar transistor manufacturing method, bipolar transistor and integrated circuit
    1.
    发明授权
    Bipolar transistor manufacturing method, bipolar transistor and integrated circuit 有权
    双极晶体管制造方法，双极晶体管和集成电路

    公开(公告)号：US08686424B2

    公开(公告)日：2014-04-01

    申请号：US13616400

    申请日：2012-09-14

    申请人： Evelyne Gridelet ,  Johannes Josephus Theodorus Marinus Donkers ,  Tony Vanhoucke ,  Petrus Hubertus Cornelis Magnee ,  Hans Mertens ,  Blandine Duriez

    发明人： Evelyne Gridelet ,  Johannes Josephus Theodorus Marinus Donkers ,  Tony Vanhoucke ,  Petrus Hubertus Cornelis Magnee ,  Hans Mertens ,  Blandine Duriez

    IPC分类号： H01L29/72

    CPC分类号： H01L29/732 ,  H01L29/66242 ,  H01L29/7378

    摘要： Disclosed is a method of manufacturing a bipolar transistor, comprising providing a substrate (10) comprising a first isolation region (12) separated from a second isolation region by an active region (11) comprising a collector impurity; forming a layer stack over said substrate, said layer stack comprising a base layer (14, 14′), a silicon capping layer (15) over said base layer and a silicon-germanium (SiGe) base contact layer (40) over said silicon capping layer; etching the SiGe base contact layer to form an emitter window (50) over the collector impurity, wherein the silicon emitter cap layer is used as etch stop layer; forming sidewall spacers (22) in the emitter window; and filling the emitter window with an emitter material (24). A bipolar transistor manufactured in accordance with this method and an IC comprising one or more of such bipolar transistors are also disclosed.

    摘要翻译： 公开了一种制造双极晶体管的方法，包括提供包括通过包括集电极杂质的有源区（11）与第二隔离区分离的第一隔离区（12）的衬底（10） 在所述衬底上形成层堆叠，所述层堆叠包括基底层（14,14'），所述基底层上的硅覆盖层（15）和位于所述硅上的硅 - 锗（SiGe）基接触层（40） 盖层; 蚀刻SiGe基极接触层以在集电极杂质上形成发射极窗口（50），其中硅发射极盖层用作蚀刻停止层; 在发射器窗口中形成侧壁间隔物（22）; 以及用发射体材料（24）填充发射器窗口。 还公开了根据该方法制造的双极晶体管和包括一个或多个这样的双极晶体管的IC。

    Heterojunction bipolar transistor manufacturing method and integrated circuit comprising a heterojunction bipolar transistor
    3.
    发明授权
    Heterojunction bipolar transistor manufacturing method and integrated circuit comprising a heterojunction bipolar transistor 有权
    异质结双极晶体管制造方法和包括异质结双极晶体管的集成电路

    公开(公告)号：US08872237B2

    公开(公告)日：2014-10-28

    申请号：US13299755

    申请日：2011-11-18

    申请人： Tony Vanhoucke ,  Johannes Josephus Theodorus Marinus Donkers ,  Hans Mertens ,  Blandine Duriez ,  Evelyne Gridelet

    发明人： Tony Vanhoucke ,  Johannes Josephus Theodorus Marinus Donkers ,  Hans Mertens ,  Blandine Duriez ,  Evelyne Gridelet

    IPC分类号： H01L29/66 ,  H01L29/737 ,  H01L29/08

    CPC分类号： H01L29/0821 ,  H01L29/66242 ,  H01L29/7378

    摘要： Disclosed is a method of manufacturing a heterojunction bipolar transistor comprising a substrate, an upper region of said substrate comprising an active region of the bipolar transistor bordered by shallow trench insulation, said active region comprising a buried collector region extending to a depth beyond the depth of the shallow trench insulation, the method comprising forming a trench in the substrate adjacent to said active region, said trench extending through the shallow trench insulation; at least partially filling said trench with an impurity; and forming a collector sinker in the substrate by developing said impurity to extend into the substrate to a depth beyond the depth of the shallow trench insulation. An IC comprising a heterojunction bipolar transistor manufactured by this method is also disclosed.

    摘要翻译： 公开了一种制造包括衬底的异质结双极晶体管的方法，所述衬底的上部区域包括由浅沟槽绝缘体界定的双极晶体管的有源区，所述有源区包括延伸到超过深度 所述浅沟槽绝缘体，所述方法包括在所述衬底中邻近所述有源区形成沟槽，所述沟槽延伸穿过所述浅沟槽绝缘体; 至少部分地用杂质填充所述沟槽; 以及通过使所述杂质显影而在衬底中形成收集器沉降片，以延伸到衬底中深度超过浅沟槽绝缘深度的深度。 还公开了一种包括通过该方法制造的异质结双极晶体管的IC。

    HETEROJUNCTION BIPOLAR TRANSISTOR MANUFACTURING METHOD AND INTEGRATED CIRCUIT COMPRISING A HETEROJUNCTION BIPOLAR TRANSISTOR
    4.
    发明申请
    HETEROJUNCTION BIPOLAR TRANSISTOR MANUFACTURING METHOD AND INTEGRATED CIRCUIT COMPRISING A HETEROJUNCTION BIPOLAR TRANSISTOR 有权
    异相双极晶体管制造方法和包含异相双极晶体管的集成电路

    公开(公告)号：US20120132961A1

    公开(公告)日：2012-05-31

    申请号：US13299755

    申请日：2011-11-18

    申请人： Tony Vanhoucke ,  Johannes Josephus Theodorus Marinus Donkers ,  Hans Mertens ,  Blandine Duriez ,  Evelyne Gridelet

    发明人： Tony Vanhoucke ,  Johannes Josephus Theodorus Marinus Donkers ,  Hans Mertens ,  Blandine Duriez ,  Evelyne Gridelet

    IPC分类号： H01L29/737 ,  H01L21/328

    CPC分类号： H01L29/0821 ,  H01L29/66242 ,  H01L29/7378

    摘要： Disclosed is a method of manufacturing a heterojunction bipolar transistor comprising a substrate, an upper region of said substrate comprising an active region of the bipolar transistor bordered by shallow trench insulation, said active region comprising a buried collector region extending to a depth beyond the depth of the shallow trench insulation, the method comprising forming a trench in the substrate adjacent to said active region, said trench extending through the shallow trench insulation; at least partially filling said trench with an impurity; and forming a collector sinker in the substrate by developing said impurity to extend into the substrate to a depth beyond the depth of the shallow trench insulation. An IC comprising a heterojunction bipolar transistor manufactured by this method is also disclosed.

    摘要翻译： 公开了一种制造包括衬底的异质结双极晶体管的方法，所述衬底的上部区域包括由浅沟槽绝缘体界定的双极晶体管的有源区，所述有源区包括延伸到超过深度 所述浅沟槽绝缘体，所述方法包括在所述衬底中邻近所述有源区形成沟槽，所述沟槽延伸穿过所述浅沟槽绝缘体; 至少部分地用杂质填充所述沟槽; 以及通过使所述杂质显影而在衬底中形成收集器沉降片，以延伸到衬底中深度超过浅沟槽绝缘深度的深度。 还公开了一种包括通过该方法制造的异质结双极晶体管的IC。

    HETEROJUNCTION BIOPOLAR TRANSISTOR AND MANUFACTURING METHOD
    7.
    发明申请
    HETEROJUNCTION BIOPOLAR TRANSISTOR AND MANUFACTURING METHOD 有权
    异源双极晶体管和制造方法

    公开(公告)号：US20120037914A1

    公开(公告)日：2012-02-16

    申请号：US13205932

    申请日：2011-08-09

    申请人： Tony Vanhoucke ,  Johannes Josephus Theodorus Marinus Donkers ,  Hans Mertens ,  Blandine Duriez ,  Evelyne Marie Josephe Fabienne Gridelet

    发明人： Tony Vanhoucke ,  Johannes Josephus Theodorus Marinus Donkers ,  Hans Mertens ,  Blandine Duriez ,  Evelyne Marie Josephe Fabienne Gridelet

    IPC分类号： H01L29/737 ,  H01L21/331

    CPC分类号： H01L29/7378 ,  H01L29/1004 ,  H01L29/66242

    摘要： A method of manufacturing a heterojunction bipolar transistor, including providing a substrate comprising an active region bordered by shallow trench insulation regions; depositing a stack of a dielectric layer and a polysilicon layer over the substrate; forming a base window in the stack, the base window extending over the active region and part of the shallow trench insulation regions, the base window having a trench extending vertically between the active region and one of the shallow trench insulation regions; growing an epitaxial base material inside the base window; forming a spacer on the exposed side walls of the base material; and filling the base window with an emitter material. A HBT manufactured in this manner and an IC including such an HBT.

    摘要翻译： 一种制造异质结双极晶体管的方法，包括提供包括由浅沟槽绝缘区域界定的有源区的衬底; 在衬底上沉积介电层和多晶硅层的堆叠; 在所述堆叠中形成基窗，所述基窗在所述有源区和所述浅沟槽绝缘区的一部分上延伸，所述基窗具有在所述有源区和所述浅沟绝缘区之间的垂直延伸的沟槽; 在基座窗内生长外延基底材料; 在基材的暴露的侧壁上形成间隔物; 并用发射体材料填充基座窗口。 以这种方式制造的HBT和包括这种HBT的IC。

    Heterojunction biopolar transistor and manufacturing method
    8.
    发明授权
    Heterojunction biopolar transistor and manufacturing method 有权
    异质结生物极晶体管及其制造方法

    公开(公告)号：US08803156B2

    公开(公告)日：2014-08-12

    申请号：US13205932

    申请日：2011-08-09

    申请人： Tony Vanhoucke ,  Johannes Josephus Theodorus Marinus Donkers ,  Hans Mertens ,  Blandine Duriez ,  Evelyne Marie Josephe Fabienne Gridelet

    发明人： Tony Vanhoucke ,  Johannes Josephus Theodorus Marinus Donkers ,  Hans Mertens ,  Blandine Duriez ,  Evelyne Marie Josephe Fabienne Gridelet

    IPC分类号： H01L29/00 ,  H01L31/036

    CPC分类号： H01L29/7378 ,  H01L29/1004 ,  H01L29/66242

    摘要： A method of manufacturing a heterojunction bipolar transistor, including providing a substrate comprising an active region bordered by shallow trench insulation regions; depositing a stack of a dielectric layer and a polysilicon layer over the substrate; forming a base window in the stack, the base window extending over the active region and part of the shallow trench insulation regions, the base window having a trench extending vertically between the active region and one of the shallow trench insulation regions; growing an epitaxial base material inside the base window; forming a spacer on the exposed side walls of the base material; and filling the base window with an emitter material. A HBT manufactured in this manner and an IC including such an HBT.

    摘要翻译： 一种制造异质结双极晶体管的方法，包括提供包括由浅沟槽绝缘区域界定的有源区的衬底; 在衬底上沉积介电层和多晶硅层的堆叠; 在所述堆叠中形成基窗，所述基窗在所述有源区和所述浅沟槽绝缘区的一部分上延伸，所述基窗具有在所述有源区和所述浅沟绝缘区之间的垂直延伸的沟槽; 在基座窗内生长外延基体材料; 在基材的暴露的侧壁上形成间隔物; 并用发射体材料填充基座窗口。 以这种方式制造的HBT和包括这种HBT的IC。

    Method of fabrication SiGe heterojunction bipolar transistor
    9.
    发明授权
    Method of fabrication SiGe heterojunction bipolar transistor 有权
    SiGe异质结双极晶体管的制造方法

    公开(公告)号：US07074685B2

    公开(公告)日：2006-07-11

    申请号：US10515763

    申请日：2003-05-27

    申请人： Petrus Hubertus Cornelis Magnee ,  Johannes Josephus Theodorus Marinus Donkers

    发明人： Petrus Hubertus Cornelis Magnee ,  Johannes Josephus Theodorus Marinus Donkers

    IPC分类号： H01L21/331 ,  H01L21/36

    CPC分类号： H01L29/66242

    摘要： A method of fabricating a semiconductor device includes a SiGe(C) heterojunction bipolar transistor using a non-selective epitaxial growth where an insulating layer is formed on a substrate and a layer structure including a conductive layer is provided on the insulating layer. A transistor area opening is etched through the conductive layer, and an SiGe base layer is deposited inside the transistor area opening. An insulator is formed on an upper surface so as to fill the transistor area opening, wherein prior to filling the opening, a nitride layer is formed as an inner layer of the transistor area opening.

    摘要翻译： 制造半导体器件的方法包括使用非选择性外延生长的SiGe（C）异质结双极晶体管，其中在衬底上形成绝缘层，并且在绝缘层上设置包括导电层的层结构。 通过导电层蚀刻晶体管区域开口，并且在晶体管区域开口内部沉积SiGe基极层。 在上表面上形成绝缘体以填充晶体管区域开口，其中在填充开口之前，形成氮化物层作为晶体管区域开口的内层。

    Method of manufacturing a semiconductor device
    10.
    发明授权
    Method of manufacturing a semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号：US07794540B2

    公开(公告)日：2010-09-14

    申请号：US10539549

    申请日：2003-12-16

    申请人： Petrus Hubertus Cornelis Magnee ,  Johannes Josephus Theodorus Marinus Donkers ,  Xiaoping Shi

    发明人： Petrus Hubertus Cornelis Magnee ,  Johannes Josephus Theodorus Marinus Donkers ,  Xiaoping Shi

    IPC分类号： C30B25/00 ,  C30B28/12 ,  H01L21/00 ,  H01L27/06

    CPC分类号： H01L21/02529 ,  H01L21/02532 ,  H01L21/02639 ,  H01L21/02642

    摘要： Method of manufacturing a semiconductor device, in which on a region of silicon oxide (5) situated next to a region of monocrystalline silicon (4) at the surface (3) of a semiconductor body (1), a non-monocrystalline auxiliary layer (8) is formed. The auxiliary layer is formed in two steps. In the first step, the silicon body is heated in an atmosphere comprising a gaseous arsenic compound; in the second step it is heated in an atmosphere comprising a gaseous silicon compound instead of said arsenic compound. Thus, the regions of silicon oxide are provided with an amorphous or polycrystalline silicon seed layer in a self-aligned manner.

    摘要翻译： 制造半导体器件的方法，其中在位于半导体本体（1）的表面（3）的单晶硅（4）的旁边的氧化硅（5）的区域上，形成非单晶辅助层（ 8）。 辅助层分两步形成。 在第一步骤中，硅体在包含气态砷化合物的气氛中加热; 在第二步中，在包含气态硅化合物的气氛中代替所述砷化合物进行加热。 因此，氧化硅区域以自对准的方式设置有非晶或多晶硅籽晶层。