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    Bipolar transistor manufacturing method, bipolar transistor and integrated circuit
    2.
    发明授权
    Bipolar transistor manufacturing method, bipolar transistor and integrated circuit 有权
    双极晶体管制造方法，双极晶体管和集成电路

    公开(公告)号：US08686424B2

    公开(公告)日：2014-04-01

    申请号：US13616400

    申请日：2012-09-14

    申请人： Evelyne Gridelet ,  Johannes Josephus Theodorus Marinus Donkers ,  Tony Vanhoucke ,  Petrus Hubertus Cornelis Magnee ,  Hans Mertens ,  Blandine Duriez

    发明人： Evelyne Gridelet ,  Johannes Josephus Theodorus Marinus Donkers ,  Tony Vanhoucke ,  Petrus Hubertus Cornelis Magnee ,  Hans Mertens ,  Blandine Duriez

    IPC分类号： H01L29/72

    CPC分类号： H01L29/732 ,  H01L29/66242 ,  H01L29/7378

    摘要： Disclosed is a method of manufacturing a bipolar transistor, comprising providing a substrate (10) comprising a first isolation region (12) separated from a second isolation region by an active region (11) comprising a collector impurity; forming a layer stack over said substrate, said layer stack comprising a base layer (14, 14′), a silicon capping layer (15) over said base layer and a silicon-germanium (SiGe) base contact layer (40) over said silicon capping layer; etching the SiGe base contact layer to form an emitter window (50) over the collector impurity, wherein the silicon emitter cap layer is used as etch stop layer; forming sidewall spacers (22) in the emitter window; and filling the emitter window with an emitter material (24). A bipolar transistor manufactured in accordance with this method and an IC comprising one or more of such bipolar transistors are also disclosed.

    摘要翻译： 公开了一种制造双极晶体管的方法，包括提供包括通过包括集电极杂质的有源区（11）与第二隔离区分离的第一隔离区（12）的衬底（10） 在所述衬底上形成层堆叠，所述层堆叠包括基底层（14,14'），所述基底层上的硅覆盖层（15）和位于所述硅上的硅 - 锗（SiGe）基接触层（40） 盖层; 蚀刻SiGe基极接触层以在集电极杂质上形成发射极窗口（50），其中硅发射极盖层用作蚀刻停止层; 在发射器窗口中形成侧壁间隔物（22）; 以及用发射体材料（24）填充发射器窗口。 还公开了根据该方法制造的双极晶体管和包括一个或多个这样的双极晶体管的IC。

    Heterojunction bipolar transistor manufacturing method and integrated circuit comprising a heterojunction bipolar transistor
    3.
    发明授权
    Heterojunction bipolar transistor manufacturing method and integrated circuit comprising a heterojunction bipolar transistor 有权
    异质结双极晶体管制造方法和包括异质结双极晶体管的集成电路

    公开(公告)号：US08872237B2

    公开(公告)日：2014-10-28

    申请号：US13299755

    申请日：2011-11-18

    申请人： Tony Vanhoucke ,  Johannes Josephus Theodorus Marinus Donkers ,  Hans Mertens ,  Blandine Duriez ,  Evelyne Gridelet

    发明人： Tony Vanhoucke ,  Johannes Josephus Theodorus Marinus Donkers ,  Hans Mertens ,  Blandine Duriez ,  Evelyne Gridelet

    IPC分类号： H01L29/66 ,  H01L29/737 ,  H01L29/08

    CPC分类号： H01L29/0821 ,  H01L29/66242 ,  H01L29/7378

    摘要： Disclosed is a method of manufacturing a heterojunction bipolar transistor comprising a substrate, an upper region of said substrate comprising an active region of the bipolar transistor bordered by shallow trench insulation, said active region comprising a buried collector region extending to a depth beyond the depth of the shallow trench insulation, the method comprising forming a trench in the substrate adjacent to said active region, said trench extending through the shallow trench insulation; at least partially filling said trench with an impurity; and forming a collector sinker in the substrate by developing said impurity to extend into the substrate to a depth beyond the depth of the shallow trench insulation. An IC comprising a heterojunction bipolar transistor manufactured by this method is also disclosed.

    摘要翻译： 公开了一种制造包括衬底的异质结双极晶体管的方法，所述衬底的上部区域包括由浅沟槽绝缘体界定的双极晶体管的有源区，所述有源区包括延伸到超过深度 所述浅沟槽绝缘体，所述方法包括在所述衬底中邻近所述有源区形成沟槽，所述沟槽延伸穿过所述浅沟槽绝缘体; 至少部分地用杂质填充所述沟槽; 以及通过使所述杂质显影而在衬底中形成收集器沉降片，以延伸到衬底中深度超过浅沟槽绝缘深度的深度。 还公开了一种包括通过该方法制造的异质结双极晶体管的IC。

    HETEROJUNCTION BIPOLAR TRANSISTOR MANUFACTURING METHOD AND INTEGRATED CIRCUIT COMPRISING A HETEROJUNCTION BIPOLAR TRANSISTOR
    4.
    发明申请
    HETEROJUNCTION BIPOLAR TRANSISTOR MANUFACTURING METHOD AND INTEGRATED CIRCUIT COMPRISING A HETEROJUNCTION BIPOLAR TRANSISTOR 有权
    异相双极晶体管制造方法和包含异相双极晶体管的集成电路

    公开(公告)号：US20120132961A1

    公开(公告)日：2012-05-31

    申请号：US13299755

    申请日：2011-11-18

    申请人： Tony Vanhoucke ,  Johannes Josephus Theodorus Marinus Donkers ,  Hans Mertens ,  Blandine Duriez ,  Evelyne Gridelet

    发明人： Tony Vanhoucke ,  Johannes Josephus Theodorus Marinus Donkers ,  Hans Mertens ,  Blandine Duriez ,  Evelyne Gridelet

    IPC分类号： H01L29/737 ,  H01L21/328

    CPC分类号： H01L29/0821 ,  H01L29/66242 ,  H01L29/7378

    摘要： Disclosed is a method of manufacturing a heterojunction bipolar transistor comprising a substrate, an upper region of said substrate comprising an active region of the bipolar transistor bordered by shallow trench insulation, said active region comprising a buried collector region extending to a depth beyond the depth of the shallow trench insulation, the method comprising forming a trench in the substrate adjacent to said active region, said trench extending through the shallow trench insulation; at least partially filling said trench with an impurity; and forming a collector sinker in the substrate by developing said impurity to extend into the substrate to a depth beyond the depth of the shallow trench insulation. An IC comprising a heterojunction bipolar transistor manufactured by this method is also disclosed.

    摘要翻译： 公开了一种制造包括衬底的异质结双极晶体管的方法，所述衬底的上部区域包括由浅沟槽绝缘体界定的双极晶体管的有源区，所述有源区包括延伸到超过深度 所述浅沟槽绝缘体，所述方法包括在所述衬底中邻近所述有源区形成沟槽，所述沟槽延伸穿过所述浅沟槽绝缘体; 至少部分地用杂质填充所述沟槽; 以及通过使所述杂质显影而在衬底中形成收集器沉降片，以延伸到衬底中深度超过浅沟槽绝缘深度的深度。 还公开了一种包括通过该方法制造的异质结双极晶体管的IC。

    METHOD OF MANUFACTURING AN IC COMPRISING A PLURALITY OF BIPOLAR TRANSISTORS AND IC COMPRISING A PLURALITY OF BIPOLAR TRANSISTORS
    7.
    发明申请
    METHOD OF MANUFACTURING AN IC COMPRISING A PLURALITY OF BIPOLAR TRANSISTORS AND IC COMPRISING A PLURALITY OF BIPOLAR TRANSISTORS 有权
    制造包含多晶双极晶体管的IC的方法和包含多种双极晶体管的IC

    公开(公告)号：US20130032891A1

    公开(公告)日：2013-02-07

    申请号：US13560517

    申请日：2012-07-27

    申请人： Hans Mertens ,  Johannes Theodorus Marinus Donkers ,  Evelyne Gridelet ,  Tony Vanhoucke ,  Petrus Hubertus Cornelis Magnee

    发明人： Hans Mertens ,  Johannes Theodorus Marinus Donkers ,  Evelyne Gridelet ,  Tony Vanhoucke ,  Petrus Hubertus Cornelis Magnee

    IPC分类号： H01L21/331 ,  H01L27/088

    CPC分类号： H01L21/8222 ,  H01L21/82285 ,  H01L27/0825 ,  H01L27/0826

    摘要： A method of manufacturing an integrated circuit comprising bipolar transistors including first and second type bipolar transistors, the method comprising providing a substrate comprising first isolation regions each separated from a second isolation region by an active region comprising a collector impurity of one of the bipolar transistors; forming a base layer stack over the substrate; forming a first emitter cap layer of a first effective thickness over the base layer stack in the areas of the first type bipolar transistor; forming a second emitter cap layer of a second effective thickness different from the first effective thickness over the base layer stack in the areas of the second type bipolar transistor; and forming an emitter over the emitter cap layer of each of the bipolar transistors. An IC in accordance with this method.

    摘要翻译： 一种制造集成电路的方法，包括包括第一和第二类型双极晶体管的双极晶体管，所述方法包括提供包括第一隔离区域的衬底，每个隔离区域与第二隔离区域分离，所述有源区域包括所述双极晶体管之一的集电极杂质; 在衬底上形成基层堆叠; 在所述第一类型双极晶体管的区域中在所述基极层堆叠上形成第一有效厚度的第一发射极盖层; 在所述第二类型双极晶体管的区域中形成与所述基极层叠层上的所述第一有效厚度不同的第二有效厚度的第二发射极帽层; 以及在每个双极晶体管的发射极盖层上形成发射极。 根据这种方法的IC。

    Method of manufacturing an IC comprising a plurality of bipolar transistors and IC comprising a plurality of bipolar transistors
    8.
    发明授权
    Method of manufacturing an IC comprising a plurality of bipolar transistors and IC comprising a plurality of bipolar transistors 有权
    制造包括多个双极晶体管的IC的方法和包括多个双极晶体管的IC

    公开(公告)号：US08901669B2

    公开(公告)日：2014-12-02

    申请号：US13560517

    申请日：2012-07-27

    申请人： Hans Mertens ,  Johannes Theodorus Marinus Donkers ,  Evelyne Gridelet ,  Tony Vanhoucke ,  Petrus Hubertus Cornelis Magnee

    发明人： Hans Mertens ,  Johannes Theodorus Marinus Donkers ,  Evelyne Gridelet ,  Tony Vanhoucke ,  Petrus Hubertus Cornelis Magnee

    IPC分类号： H01L29/66

    CPC分类号： H01L21/8222 ,  H01L21/82285 ,  H01L27/0825 ,  H01L27/0826

    摘要： A method of manufacturing an integrated circuit comprising bipolar transistors including first and second type bipolar transistors, the method comprising providing a substrate comprising first isolation regions each separated from a second isolation region by an active region comprising a collector impurity of one of the bipolar transistors; forming a base layer stack over the substrate; forming a first emitter cap layer of a first effective thickness over the base layer stack in the areas of the first type bipolar transistor; forming a second emitter cap layer of a second effective thickness different from the first effective thickness over the base layer stack in the areas of the second type bipolar transistor; and forming an emitter over the emitter cap layer of each of the bipolar transistors. An IC in accordance with this method.

    摘要翻译： 一种制造集成电路的方法，包括包括第一和第二类型双极晶体管的双极晶体管，所述方法包括提供包括第一隔离区域的衬底，每个隔离区域与第二隔离区域分离，所述有源区域包括所述双极晶体管之一的集电极杂质; 在衬底上形成基层堆叠; 在所述第一类型双极晶体管的区域中在所述基极层堆叠上形成第一有效厚度的第一发射极盖层; 在所述第二类型双极晶体管的区域中形成与所述基极层叠层上的所述第一有效厚度不同的第二有效厚度的第二发射极帽层; 以及在每个双极晶体管的发射极盖层上形成发射极。 根据这种方法的IC。

    SENSOR CHIP AND METHOD OF MANUFACTURING THE SAME
    9.
    发明申请
    SENSOR CHIP AND METHOD OF MANUFACTURING THE SAME 有权
    传感器芯片及其制造方法

    公开(公告)号：US20110027128A1

    公开(公告)日：2011-02-03

    申请号：US12934827

    申请日：2009-03-19

    申请人： Evelyne Gridelet ,  Franciscus Widdershoven ,  Pablo Garcia Tello ,  Magali Lambert

    发明人： Evelyne Gridelet ,  Franciscus Widdershoven ,  Pablo Garcia Tello ,  Magali Lambert

    IPC分类号： G01N27/00 ,  B05D5/12

    CPC分类号： G01N33/5438 ,  G01N27/226

    摘要： A sensor chip (100) for detecting particles, the sensor chip (100) comprising a substrate (102), an electric connection structure (104) arranged in a surface portion of the substrate (102) and adapted for an electric connection to an electric connection element (106), a sensor active region (108) arranged in another surface portion of the substrate (102) and being sensitive to the presence of the particles to be detected, and a continuous dielectric layer (110) covering the substrate (102) including covering the electric connection structure (104) and the sensor active region (108).

    摘要翻译： 一种用于检测颗粒的传感器芯片（100），所述传感器芯片（100）包括基板（102），电连接结构（104），布置在所述基板（102）的表面部分中，并且适于电连接到电 连接元件（106），布置在所述基板（102）的另一表面部分中并且对待检测的颗粒的存在敏感的传感器有源区域（108）以及覆盖所述基板（102）的连续介电层（110） ）包括覆盖电连接结构（104）和传感器有源区（108）。

    Microfluidic pump with metal electrode having variable oxidation state
    10.
    发明授权
    Microfluidic pump with metal electrode having variable oxidation state 有权
    具有可变氧化态的金属电极的微流量泵

    公开(公告)号：US09206794B2

    公开(公告)日：2015-12-08

    申请号：US12989012

    申请日：2009-04-22

    申请人： Evelyne Gridelet

    发明人： Evelyne Gridelet

    IPC分类号： F04B19/00 ,  B01L3/00

    CPC分类号： F04B19/006 ,  B01L3/50273 ,  B01L2300/0645 ,  B01L2400/0421 ,  B01L2400/0427 ,  Y10T29/49002

    摘要： A microfluidic pump comprises a plurality of metal electrodes (10) which oxidise in air, a liquid droplet (14) to be moved by the pump, which is in contact with a least one metal electrode, and a controller for controlling the oxidation state of the metal electrodes in order to vary the electrode wettability. This arrangement enables full integration with a semiconductor device, and with low drive voltages.

    摘要翻译： 微流体泵包括在空气中氧化的多个金属电极（10），与至少一个金属电极接触的由泵移动的液滴（14）和用于控制氧化态的控制器 金属电极为了改变电极的润湿性。 这种布置使得能够与半导体器件完全集成，并且具有低驱动电压。