Instruction cracking based on machine state
    1.
    发明授权
    Instruction cracking based on machine state 有权
    基于机器状态的指令开裂

    公开(公告)号:US08938605B2

    公开(公告)日:2015-01-20

    申请号:US12718685

    申请日:2010-03-05

    IPC分类号: G06F9/30 G06F9/34

    摘要: A method, information processing system, and computer program product manage instruction execution based on machine state. At least one instruction is received. The at least one instruction is decoded. A current machine state is determined in response to the decoding. The at least one instruction is organized into a set of unit of operations based on the current machine state that has been determined. The set of unit of operations is executed.

    摘要翻译: 一种基于机器状态的方法,信息处理系统和计算机程序产品管理指令执行。 至少接收一条指令。 至少一条指令被解码。 响应于解码确定当前机器状态。 基于已经确定的当前机器状态将至少一个指令组织成一组操作单元。 执行一组操作单元。

    Instruction cracking and issue shortening based on instruction base fields, index fields, operand fields, and various other instruction text bits
    2.
    发明授权
    Instruction cracking and issue shortening based on instruction base fields, index fields, operand fields, and various other instruction text bits 有权
    基于指令字段,索引字段,操作数字段和各种其他指令文本位的指令破解和问题缩短

    公开(公告)号:US08464030B2

    公开(公告)日:2013-06-11

    申请号:US12757330

    申请日:2010-04-09

    摘要: A method, information processing system, and computer program product crack and/or shorten computer executable instructions. At least one instruction is received. The at least on instruction is analyzed. An instruction type associated with the at least one instruction is identified. At least one of a base field, an index field, one or more operands, and a mask field of the instruction are analyzed. At least one of the following is then performed: the at least one instruction is organized into a set of unit of operation; and the at least one instruction is shortened. The set of unit of operations is then executed.

    摘要翻译: 一种方法,信息处理系统和计算机程序产品破解和/或缩短计算机可执行指令。 至少接收一条指令。 至少对指令进行分析。 识别与该至少一条指令相关联的指令类型。 分析指令的基本字段,索引字段,一个或多个操作数和掩码字段中的至少一个。 然后执行以下中的至少一个:将至少一个指令组织成一组操作单元; 并且至少一个指令被缩短。 然后执行一组操作单元。

    Instruction length based cracking for instruction of variable length storage operands
    3.
    发明授权
    Instruction length based cracking for instruction of variable length storage operands 有权
    指令长度为可变长度存储操作数指令的破解

    公开(公告)号:US08495341B2

    公开(公告)日:2013-07-23

    申请号:US12707163

    申请日:2010-02-17

    IPC分类号: G06F9/30

    摘要: A method, information processing system, and computer program product manage variable operand length instructions. At least one variable operand length instruction is received. The at least one variable operand length instruction is analyzed. A length of at least one operand in the variable operand length instruction is identified based on the analyzing. The at least one variable operand length instruction is organized into a set of unit of operations. The set of unit of operations are executed. The executing increases one or more performance metrics of the at least one variable operand length instruction.

    摘要翻译: 一种方法,信息处理系统和计算机程序产品管理可变操作数长度指令。 接收至少一个可变操作数长度指令。 分析至少一个可变操作数长度指令。 基于分析来识别可变操作数长度指令中的至少一个操作数的长度。 所述至少一个可变操作数长度指令被组织成一组操作单元。 执行操作单元的集合。 所述执行增加所述至少一个可变操作数长度指令的一个或多个性能度量。

    INSTRUCTION LENGTH BASED CRACKING FOR INSTRUCTION OF VARIABLE LENGTH STORAGE OPERANDS
    6.
    发明申请
    INSTRUCTION LENGTH BASED CRACKING FOR INSTRUCTION OF VARIABLE LENGTH STORAGE OPERANDS 有权
    指定长度的破碎用于指示可变长度存储操作

    公开(公告)号:US20110202747A1

    公开(公告)日:2011-08-18

    申请号:US12707163

    申请日:2010-02-17

    IPC分类号: G06F9/30 G06F9/40 G06F9/312

    摘要: A method, information processing system, and computer program product manage variable operand length instructions. At least one variable operand length instruction is received. The at least one variable operand length instruction is analyzed. A length of at least one operand in the variable operand length instruction is identified based on the analyzing. The at least one variable operand length instruction is organized into a set of unit of operations. The set of unit of operations are executed. The executing increases one or more performance metrics of the at least one variable operand length instruction.

    摘要翻译: 一种方法,信息处理系统和计算机程序产品管理可变操作数长度指令。 接收至少一个可变操作数长度指令。 分析至少一个可变操作数长度指令。 基于分析来识别可变操作数长度指令中的至少一个操作数的长度。 所述至少一个可变操作数长度指令被组织成一组操作单元。 执行操作单元的集合。 所述执行增加所述至少一个可变操作数长度指令的一个或多个性能度量。

    Cracking destructively overlapping operands in variable length instructions
    7.
    发明授权
    Cracking destructively overlapping operands in variable length instructions 有权
    以可变长度指令破坏性地重叠操作数

    公开(公告)号:US08645669B2

    公开(公告)日:2014-02-04

    申请号:US12774299

    申请日:2010-05-05

    IPC分类号: G06F9/30

    摘要: A method, information processing system, and computer program product manage computer executable instructions. At least one machine instruction for execution is received. The at least one machine instruction is analyzed. The machine instruction is identified as a predefined instruction for storing a variable length first operand in a memory location. Responsive to this identification and based on fields of the machine instruction, a relative location of a variable length second operand of the instruction with location of the first operand is determined. Responsive to the relative location having the predefined relationship, a first cracking operation is performed. The first cracking operation cracks the instruction into a first set of micro-ops (Uops) to be executed in parallel. The first set of Uops is for storing a first plurality of first blocks in the first operand. Each of said first block to be stored are identical. The first set Uops are executed.

    摘要翻译: 一种方法,信息处理系统和计算机程序产品管理计算机可执行指令。 接收至少一个用于执行的机器指令。 分析至少一个机器指令。 机器指令被识别为用于将可变长度的第一操作数存储在存储器位置中的预定义指令。 响应于该识别并且基于机器指令的字段,确定指令的可变长度第二操作数与第一操作数的位置的相对位置。 响应于具有预定关系的相对位置,执行第一裂解操作。 第一个破解操作将指令分解为并行执行的第一组微操作(Uop)。 第一组Uops用于在第一操作数中存储第一多个第一块。 要存储的所述第一块的每个都是相同的。 第一组Uops被执行。

    CRACKING DESTRUCTIVELY OVERLAPPING OPERANDS IN VARIABLE LENGTH INSTRUCTIONS
    8.
    发明申请
    CRACKING DESTRUCTIVELY OVERLAPPING OPERANDS IN VARIABLE LENGTH INSTRUCTIONS 有权
    在可变长度指令中打破破坏性重复操作

    公开(公告)号:US20110276764A1

    公开(公告)日:2011-11-10

    申请号:US12774299

    申请日:2010-05-05

    IPC分类号: G06F9/30 G06F12/08 G06F9/312

    摘要: A method, information processing system, and computer program product manage computer executable instructions. At least one machine instruction for execution is received. The at least one machine instruction is analyzed. The machine instruction is identified as a predefined instruction for storing a variable length first operand in a memory location. Responsive to this identification and based on fields of the machine instruction, a relative location of a variable length second operand of the instruction with location of the first operand is determined. Responsive to the relative location having the predefined relationship, a first cracking operation is performed. The first cracking operation cracks the instruction into a first set of micro-ops (Uops) to be executed in parallel. The second set of Uops is for storing a first plurality of first blocks in the first operand. Each of said first block to be stored are identical. The first set Uops are executed.

    摘要翻译: 一种方法,信息处理系统和计算机程序产品管理计算机可执行指令。 接收至少一个用于执行的机器指令。 分析至少一个机器指令。 机器指令被识别为用于将可变长度的第一操作数存储在存储器位置中的预定义指令。 响应于该识别并且基于机器指令的字段,确定指令的可变长度第二操作数与第一操作数的位置的相对位置。 响应于具有预定关系的相对位置,执行第一裂解操作。 第一个破解操作将指令分解为并行执行的第一组微操作(Uop)。 第二组Uop用于在第一操作数中存储第一多个第一块。 要存储的所述第一块的每个都是相同的。 第一组Uops被执行。

    MODULAR BINARY MULTIPLIER FOR SIGNED AND UNSIGNED OPERANDS OF VARIABLE WIDTHS
    9.
    发明申请
    MODULAR BINARY MULTIPLIER FOR SIGNED AND UNSIGNED OPERANDS OF VARIABLE WIDTHS 有权
    用于可变宽度的签名和不相关操作的模块化二进制多路复用器

    公开(公告)号:US20070214205A1

    公开(公告)日:2007-09-13

    申请号:US11749239

    申请日:2007-05-16

    IPC分类号: G06F7/52

    摘要: A method of implementing binary multiplication in a processing device includes obtaining a multiplicand and a multiplier from a storage device; in the event the multiplier is larger than a selected length, partitioning the multiplier into a plurality of multiplier subgroups; in the event the multiplicand is larger than a selected length, partitioning the multiplicand into a plurality of multiplicand subgroups and at least one of zeroing out of unused bits of the multiplicand subgroup and sign-extending a smaller portion of the multiplicand subgroup; establishing a plurality of multiplicand multiples based on at least one of a selected multiplicand subgroup of the plurality of multiplicand subgroups and the multiplicand; selecting one or more of the multiplicand multiples of the plurality of multiplicand multiples based on the each multiplier subgroup of the plurality of multiplier subgroups; and generating a first modular product based on the selected multiplicand multiples.

    摘要翻译: 在处理设备中实现二进制乘法的方法包括从存储设备获取乘法器和乘法器; 在乘数大于选定长度的情况下,将乘法器分成多个乘法器子组; 在所述被乘数大于所选择的长度的情况下,将所述被乘数划分为多个被乘数的子组和被乘数子组的未使用的比特中的至少一个,并对被乘数子组的较小部分进行符号扩展; 基于所述多个被乘数子组和被乘数中的所选择的被乘数子群中的至少一个,建立多个被乘数; 基于所述多个乘法器子组中的每个乘法器子组来选择所述多个被乘数中的一个或多个被乘数; 以及基于所选择的被乘数生成第一模块化产品。