Mark focusing system for steppers
    1.
    发明授权
    Mark focusing system for steppers 有权
    标记用于步进器的聚焦系统

    公开(公告)号:US06190810B1

    公开(公告)日:2001-02-20

    申请号:US09483037

    申请日:2000-01-18

    IPC分类号: G03F900

    CPC分类号: G03F9/7026

    摘要: Single spot laser focusing systems are widely used by photolithographic stepping systems. The stage is moved until a spot, located in the immediate area in which the image is to be projected, achieves minimum size. This system is sensitive to the local topography within the area of the image and this can lead to less than optimum results. The present invention overcomes this problem by a process in which the spot is always directed to fall within an alignment mark field (as opposed to within the integrated circuit field). Several ways for accomplishing this are described.

    摘要翻译: 单点激光聚焦系统被光刻步进系统广泛使用。 舞台被移动到位于要投影图像的直接区域中的一个点,达到最小尺寸。 该系统对图像区域内的局部地形敏感,这可能导致不太优化的结果。 本发明通过一种方法克服了这个问题,其中光斑总是被指向落入对准标记场内(与集成电路领域相反)。 描述实现这一点的几种方法。

    Frame layout to monitor overlay performance of chip composed of multi-exposure images
    2.
    发明授权
    Frame layout to monitor overlay performance of chip composed of multi-exposure images 有权
    框架布局,以监测由多曝光图像组成的芯片的叠加性能

    公开(公告)号:US06330355B1

    公开(公告)日:2001-12-11

    申请号:US09283851

    申请日:1999-04-01

    IPC分类号: G06K932

    CPC分类号: G03F7/70633

    摘要: A frame layout and method for determining the overlay accuracy of a first chip image relative to a second chip image when the first and second chip images are used to form a single chip. One embodiment employs a vernier scale in two orthoginal directions included in the scribeline of both the first chip image and the second chip image. Another embodiment employs a box in box pattern included in the scribeline of both the first chip image and the second chip image. A layer of photoresist on an integrated circuit wafer is exposed with the first and second chip image and the associated monitor images. When the photoresist is developed the overlay accuracy of the first chip image relative to the second chip image can be determined directly from the monitor images in the photoresist.

    摘要翻译: 一种帧布局和方法,用于当第一和第二芯片图像用于形成单个芯片时,确定第一芯片图像相对于第二芯片图像的叠加精度。 一个实施例在包括在第一芯片图像和第二芯片图像的划线中的两个正交方向上使用游标刻度。 另一个实施例采用包括在第一芯片图像和第二芯片图像的划线中的盒子模式。 集成电路晶片上的一层光致抗蚀剂用第一和第二芯片图像和相关联的监视器图像曝光。 当光致抗蚀剂显影时,可以直接从光致抗蚀剂中的监视器图像确定第一芯片图像相对于第二芯片图像的覆盖精度。

    Phase shift photomask performance assurance method
    3.
    发明授权
    Phase shift photomask performance assurance method 有权
    相移光掩模性能保证方法

    公开(公告)号:US08048589B2

    公开(公告)日:2011-11-01

    申请号:US11192667

    申请日:2005-07-30

    IPC分类号: G03F1/00

    CPC分类号: G03F1/84 G03F1/32

    摘要: A method for inspecting a phase shift photomask employs a phase shift photomask having an active pattern region. An optical property of the phase shift photomask is measured within the active pattern region, rather than, for example, a non-active pattern border region. By making the measurement within the active pattern region, performance of the phase shift mask may be properly assured. The method is particularly useful for inspecting attenuated phase shift photomasks to assure absence of side-lobes when photoexposing blanket photoresist layers.

    摘要翻译: 用于检查相移光掩模的方法采用具有活性图案区域的相移光掩模。 在有源图案区域内测量相移光掩模的光学特性,而不是例如非活动图案边界区域。 通过在有源图案区域内进行测量,可以适当地确保相移掩模的性能。 该方法对于检查衰减的相移光掩模特别有用,以确保在曝光橡皮布光致抗蚀剂层时不存在侧裂片。

    Phase shift photomask performance assurance method
    4.
    发明申请
    Phase shift photomask performance assurance method 有权
    相移光掩模性能保证方法

    公开(公告)号:US20070026320A1

    公开(公告)日:2007-02-01

    申请号:US11192667

    申请日:2005-07-30

    IPC分类号: G03C5/00 G06K9/00 G03F1/00

    CPC分类号: G03F1/84 G03F1/32

    摘要: A method for inspecting a phase shift photomask employs a phase shift photomask having an active pattern region. An optical property of the phase shift photomask is measured within the active pattern region, rather than, for example, a non-active pattern border region. By making the measurement within the active pattern region, performance of the phase shift mask may be properly assured. The method is particularly useful for inspecting attenuated phase shift photomasks to assure absence of side-lobes when photoexposing blanket photoresist layers.

    摘要翻译: 用于检查相移光掩模的方法采用具有活性图案区域的相移光掩模。 在有源图案区域内测量相移光掩模的光学特性,而不是例如非活动图案边界区域。 通过在有源图案区域内进行测量,可以适当地确保相移掩模的性能。 该方法对于检查衰减的相移光掩模特别有用,以确保在曝光橡皮布光致抗蚀剂层时不存在侧裂片。

    METHOD AND SYSTEM FOR FEED-FORWARD ADVANCED PROCESS CONTROL
    5.
    发明申请
    METHOD AND SYSTEM FOR FEED-FORWARD ADVANCED PROCESS CONTROL 有权
    前进先进过程控制方法与系统

    公开(公告)号:US20120264063A1

    公开(公告)日:2012-10-18

    申请号:US13086935

    申请日:2011-04-14

    IPC分类号: G03F7/20 G06F17/50

    摘要: A method including providing a present wafer to be processed by a photolithography tool, selecting a processed wafer having a past chip design from a plurality of processed wafers, the processed wafer being previously processed by the photolithography tool, selecting a plurality of critical dimension (CD) data points extracted from a plurality of fields on the processed wafer, modeling the plurality of CD data points with a function relating CD to position on the processed wafer, creating a field layout on the present wafer for a new chip design, creating an initial exposure dose map for the new chip design using the function and the field layout, and controlling the exposure of the photolithography tool according to the initial exposure dose map to form the new chip design on the present wafer.

    摘要翻译: 一种方法,包括提供将由光刻工具处理的当前晶片,从多个经处理的晶片中选择具有过去芯片设计的处理晶片,处理的晶片由光刻工具预先处理,选择多个临界尺寸(CD )数据点,其处理晶片上的多个场中提取的数据点,以与CD相关的功能对处理的晶片上的位置对多个CD数据点进行建模,在当前晶片上创建用于新芯片设计的场布局, 使用功能和现场布局的新芯片设计的曝光剂量图,并根据初始曝光剂量图控制光刻工具的曝光,以在当前晶片上形成新的芯片设计。

    Reticle with antistatic coating
    7.
    发明申请
    Reticle with antistatic coating 有权
    带防静电涂层的光罩

    公开(公告)号:US20050186488A1

    公开(公告)日:2005-08-25

    申请号:US11092734

    申请日:2005-03-28

    CPC分类号: G03F1/40 G03F1/62 G03F1/64

    摘要: A static resistant reticle comprises a substrate and a patterning layer and is covered by an antistatic conductive film of quaternary amine (R4N)+Cl−. A pellicle structure comprising an optically transparent membrane tightly stretched on a frame is also coated by an antistatic electro conductive film of a similar material. The reticle with the pellicle form a shielded structure isolating the reticle from ESD.

    摘要翻译: 防静电标线片包括基材和图案化层,并被季胺(R 4 N N)的抗静电导电膜覆盖。 >。 包括在框架上紧密拉伸的光学透明膜的防护薄膜组件也用类似材料的抗静电导电膜涂覆。 具有防护薄膜的掩模版形成将掩模版与ESD隔离的屏蔽结构。

    Method to predict and identify defocus wafers
    8.
    发明申请
    Method to predict and identify defocus wafers 有权
    预测和识别散焦晶圆的方法

    公开(公告)号:US20050185170A1

    公开(公告)日:2005-08-25

    申请号:US10786495

    申请日:2004-02-25

    摘要: A method and system for identifying a defocus wafer by mapping a topography of each wafer in a first wafer batch using a level sensor apparatus (100); calculating a focus spot deviation (402) from the data, the focus spot deviation (402) corresponding to a height by which a focus spot of a photo exposure module would be defocused by the topography; converting the focus spot deviation (402) to a corresponding wafer stage set point to which the photo exposure module is set, to focus the focus spot on each wafer in the wafer batch; and identifying a defocus wafer in the wafer batch, as a wafer having a topography that would defocus the focus spot, even when the photo exposure module is set to the wafer stage set point.

    摘要翻译: 一种用于通过使用液位传感器装置(100)在第一晶片批次中映射每个晶片的形貌来识别散焦晶片的方法和系统; 从所述数据计算焦点偏差(402),所述焦点偏差(402)对应于所述照相曝光模块的焦点将由所述形貌散焦的高度; 将聚焦点偏差(402)转换为设置有曝光模块的对应的晶片台设定点,以将聚焦点聚焦在晶片批次中的每个晶片上; 并且即使当将曝光模块设置到晶片台设定点时,将晶片批中的散焦晶片识别为具有将焦点聚焦的形貌的晶片。

    Defect monitoring for resist layer
    9.
    发明授权
    Defect monitoring for resist layer 有权
    抗蚀剂层缺陷监测

    公开(公告)号:US08852673B2

    公开(公告)日:2014-10-07

    申请号:US13286451

    申请日:2011-11-01

    IPC分类号: G03F7/26 G03F7/40 G03F7/42

    CPC分类号: G03F7/26 G03F7/40 G03F7/405

    摘要: Methods for detecting and monitoring defects in a resist material are disclosed. In an example, a method includes forming a resist layer over a substrate; developing the resist layer; washing the developed resist layer with a thinner wash solution, wherein the washing reveals any negatively charged defects in the developed resist layer; and after the washing, inspecting for the negatively charged defects.

    摘要翻译: 公开了用于检测和监测抗蚀剂材料中的缺陷的方法。 在一个实例中,一种方法包括在衬底上形成抗蚀剂层; 显影抗蚀层; 用较薄的洗涤溶液洗涤显影的抗蚀剂层,其中洗涤显示显影的抗蚀剂层中的任何带负电荷的缺陷; 洗涤后,检查带负电的缺陷。

    DEFECT MONITORING FOR RESIST LAYER
    10.
    发明申请
    DEFECT MONITORING FOR RESIST LAYER 有权
    防腐层的缺陷监测

    公开(公告)号:US20130108775A1

    公开(公告)日:2013-05-02

    申请号:US13286451

    申请日:2011-11-01

    IPC分类号: B05D3/10

    CPC分类号: G03F7/26 G03F7/40 G03F7/405

    摘要: Methods for detecting and monitoring defects in a resist material are disclosed. In an example, a method includes forming a resist layer over a substrate; developing the resist layer; washing the developed resist layer with a thinner wash solution, wherein the washing reveals any negatively charged defects in the developed resist layer; and after the washing, inspecting for the negatively charged defects.

    摘要翻译: 公开了用于检测和监测抗蚀剂材料中的缺陷的方法。 在一个实例中,一种方法包括在衬底上形成抗蚀剂层; 显影抗蚀层; 用较薄的洗涤溶液洗涤显影的抗蚀剂层,其中洗涤显示显影的抗蚀剂层中的任何带负电荷的缺陷; 洗涤后,检查带负电的缺陷。