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    Semiconductor device
    1.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US08519475B2

    公开(公告)日：2013-08-27

    申请号：US13289742

    申请日：2011-11-04

    申请人： Fujio Masuoka ,  Hiroki Nakamura ,  Shintaro Arai ,  Tomohiko Kudo ,  Navab Singh ,  Kavitha Devi Buddharaju ,  Shen Nansheng ,  Rukmani Devi Sayanthan

    发明人： Fujio Masuoka ,  Hiroki Nakamura ,  Shintaro Arai ,  Tomohiko Kudo ,  Navab Singh ,  Kavitha Devi Buddharaju ,  Shen Nansheng ,  Rukmani Devi Sayanthan

    IPC分类号： H01L29/66

    CPC分类号： H01L29/7827 ,  H01L29/42356 ,  H01L29/42392 ,  H01L29/458 ,  H01L29/66666 ,  H01L29/78642

    摘要： A semiconductor device includes a first insulating film formed between a gate electrode and a first flat semiconductor layer, and a sidewall-shaped second insulating film formed to surround an upper sidewall of a first columnar silicon layer while contacting an upper surface of the gate electrode and to surround a sidewall of the gate electrode and the first insulating film. The semiconductor device further includes a metal-semiconductor compound formed on each of an upper surface of a first semiconductor layer of the second conductive type formed in the entirety or the upper portion of the first flat semiconductor layer, and an upper surface of the second semiconductor layer of the second conductive type formed in the upper portion of the first columnar semiconductor layer.

    摘要翻译： 半导体器件包括形成在栅极电极和第一平坦半导体层之间的第一绝缘膜，以及侧壁形状的第二绝缘膜，其形成为围绕第一柱状硅层的上侧壁，同时接触栅电极的上表面和 以围绕栅电极和第一绝缘膜的侧壁。 半导体器件还包括形成在第一导电类型的第一半导体层的上表面上的第一半导体层的整体或上部形成的金属半导体化合物和第二半导体的上表面 形成在第一柱状半导体层的上部的第二导电类型的层。

    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
    3.
    发明申请
    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
    半导体器件及其制造方法

    公开(公告)号：US20100264485A1

    公开(公告)日：2010-10-21

    申请号：US12761735

    申请日：2010-04-16

    申请人： Fujio Masuoka ,  Hiroki Nakamura ,  Shintaro Arai ,  Tomohiko Kudo ,  Navab Singh ,  Kavitha Devi Buddharaju ,  Shen Nansheng ,  Rukmani Devi Sayanthan

    发明人： Fujio Masuoka ,  Hiroki Nakamura ,  Shintaro Arai ,  Tomohiko Kudo ,  Navab Singh ,  Kavitha Devi Buddharaju ,  Shen Nansheng ,  Rukmani Devi Sayanthan

    IPC分类号： H01L29/78 ,  H01L21/336

    CPC分类号： H01L29/7827 ,  H01L29/42356 ,  H01L29/42392 ,  H01L29/458 ,  H01L29/66666 ,  H01L29/78642

    摘要： This invention provides a method of manufacturing a semiconductor device, which comprises the steps of: forming a first columnar semiconductor layer on a first flat semiconductor layer; forming a first semiconductor layer of a second conductive type in a lower portion of the first columnar semiconductor layer; forming a first insulating film around a lower sidewall of the first columnar silicon layer; forming a gate insulating film and a gate electrode around the first columnar silicon layer; forming a sidewall-shaped second insulating film to surround an upper sidewall of the first columnar silicon layer; forming a semiconductor layer of a first conductive type between the first semiconductor layer of the second conductive type and a second semiconductor layer of the second conductive type; and forming a metal-semiconductor compound on an upper surface of the first semiconductor layer of the second conductive type.

    摘要翻译： 本发明提供一种制造半导体器件的方法，其包括以下步骤：在第一平坦半导体层上形成第一柱状半导体层; 在所述第一柱状半导体层的下部形成第二导电类型的第一半导体层; 在所述第一柱状硅层的下侧壁周围形成第一绝缘膜; 在第一柱状硅层周围形成栅极绝缘膜和栅电极; 形成侧壁形状的第二绝缘膜以围绕所述第一柱状硅层的上侧壁; 在第二导电类型的第一半导体层和第二导电类型的第二半导体层之间形成第一导电类型的半导体层; 以及在所述第二导电类型的所述第一半导体层的上表面上形成金属 - 半导体化合物。

    Semiconductor device and production method thereof
    7.
    发明授权
    Semiconductor device and production method thereof 有权
    半导体装置及其制造方法

    公开(公告)号：US08466512B2

    公开(公告)日：2013-06-18

    申请号：US12858840

    申请日：2010-08-18

    申请人： Fujio Masuoka ,  Shintaro Arai ,  Hiroki Nakamura ,  Tomohiko Kudo ,  R. Ramana Murthy ,  Nansheng Shen ,  Kavitha Devi Buddharaju ,  Navab Singh

    发明人： Fujio Masuoka ,  Shintaro Arai ,  Hiroki Nakamura ,  Tomohiko Kudo ,  R. Ramana Murthy ,  Nansheng Shen ,  Kavitha Devi Buddharaju ,  Navab Singh

    IPC分类号： H01L29/66

    CPC分类号： H01L29/66666 ,  H01L21/76804 ,  H01L21/76816 ,  H01L29/41741 ,  H01L29/42356 ,  H01L29/7827

    摘要： A method for producing a semiconductor device includes preparing a structure having a substrate, a planar semiconductor layer and a columnar semiconductor layer, forming a second drain/source region in the upper part of the columnar semiconductor layer, forming a contact stopper film and a contact interlayer film, and forming a contact layer on the second drain/source region. The step for forming the contact layer includes forming a pattern and etching the contact interlayer film to the contact stopper film using the pattern to form a contact hole for the contact layer and removing the contact stopper film remaining at the bottom of the contact hole by etching. The projection of the bottom surface of the contact hole onto the substrate is within the circumference of the projected profile of the contact stopper film formed on the top and side surface of the columnar semiconductor layer onto the substrate.

    摘要翻译： 一种制造半导体器件的方法包括制备具有基板，平面半导体层和柱状半导体层的结构，在柱状半导体层的上部形成第二漏极/源极区域，形成接触阻挡膜和触点 并在第二漏极/源极区域上形成接触层。 形成接触层的步骤包括形成图案，并使用图案将接触层间膜蚀刻到接触阻挡膜，以形成用于接触层的接触孔，并通过蚀刻去除残留在接触孔底部的接触阻挡膜 。 接触孔的底面向基板的突出部位于形成在柱状半导体层的顶部和侧面上的接触阻挡膜的突出轮廓的圆周上。

    Production method for semiconductor device
    9.
    发明授权
    Production method for semiconductor device 有权
    半导体器件的制造方法

    公开(公告)号：US08178399B1

    公开(公告)日：2012-05-15

    申请号：US13354579

    申请日：2012-01-20

    申请人： Fujio Masuoka ,  Tomohiko Kudo ,  Shintaro Arai ,  Hiroki Nakamura

    发明人： Fujio Masuoka ,  Tomohiko Kudo ,  Shintaro Arai ,  Hiroki Nakamura

    IPC分类号： H01L21/00 ,  H01L21/84 ,  H01L21/336 ,  H01L21/8234 ,  H01L21/8238

    CPC分类号： H01L29/78642 ,  H01L29/42392 ,  H01L29/66666

    摘要： An SGT production method includes forming a pillar-shaped first-conductive-type semiconductor layer and forming a second-conductive-type semiconductor layer underneath the first-conductive-type semiconductor layer. A dummy gate dielectric film and a dummy gate electrode are formed around the first-conductive-type semiconductor layer and a first dielectric film is formed on an upper region of a sidewall of the first-conductive-type semiconductor layer in contact with a top of the gate electrode. A first dielectric film is formed on a sidewall of the gate electrode and a second-conductive-type semiconductor layer is formed in an upper portion of the first-conductive-type semiconductor layer. A second-conductive-type semiconductor layer is formed in an upper portion of the first-conductive-type semiconductor layer and a metal-semiconductor compound is formed on each of the second-conductive-type semiconductor layers. The dummy gate dielectric film and the dummy gate electrode are removed and a high-k gate dielectric film and a metal gate electrode are formed.

    摘要翻译： SGT制造方法包括形成柱状的第一导电型半导体层，在第一导电型半导体层的下方形成第二导电型半导体层。 在第一导电型半导体层周围形成虚拟栅极电介质膜和虚拟栅电极，并且第一电介质膜形成在第一导电型半导体层的与顶部接触的第一导电型半导体层的侧壁的上部区域 栅电极。 第一电介质膜形成在栅电极的侧壁上，第二导电型半导体层形成在第一导电型半导体层的上部。 第二导电型半导体层形成在第一导电型半导体层的上部，并且在每个第二导电型半导体层上形成金属半导体化合物。 除去虚拟栅极电介质膜和虚拟栅电极，形成高k栅极电介质膜和金属栅电极。

    SEMICONDUCTOR DEVICE AND METHOD OF PRODUCING THE SAME
    10.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF PRODUCING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20120299068A1

    公开(公告)日：2012-11-29

    申请号：US13478359

    申请日：2012-05-23

    申请人： Fujio Masuoka ,  Shintaro Arai ,  Hiroki Nakamura ,  Tomohiko Kudo

    发明人： Fujio Masuoka ,  Shintaro Arai ,  Hiroki Nakamura ,  Tomohiko Kudo

    IPC分类号： H01L29/78

    CPC分类号： H01L29/78642 ,  H01L29/42392 ,  H01L29/66772

    摘要： It is an object to provide an SGT production method capable of obtaining a structure for reducing a resistance of a gate, a desired gate length, desired source and drain configurations and a desired diameter of a pillar-shaped semiconductor. The object is achieved by a semiconductor device production method which comprises the steps of: forming a pillar-shaped first-conductive-type semiconductor layer; forming a second-conductive-type semiconductor layer underneath the pillar-shaped first-conductive-type semiconductor layer; forming a gate dielectric film and a gate electrode around the pillar-shaped first-conductive-type semiconductor layer; forming a sidewall-shaped dielectric film on an upper region of a sidewall of the pillar-shaped first-conductive-type semiconductor layer and in contact with a top of the gate; forming a sidewall-shaped dielectric film on a sidewall of the gate; and forming a second-conductive-type semiconductor layer in an upper portion of the pillar-shaped first-conductive-type semiconductor layer and on the second-conductive-type semiconductor layer formed underneath the pillar-shaped first-conductive-type semiconductor layer.

    摘要翻译： 本发明的目的是提供一种能够获得用于降低栅极的电阻，期望的栅极长度，期望的源极和漏极配置以及柱状半导体的期望直径的结构的SGT制造方法。 该目的通过一种半导体器件制造方法来实现，该方法包括以下步骤：形成柱状的第一导电型半导体层; 在所述柱状第一导电型半导体层的下方形成第二导电型半导体层; 在柱状第一导电型半导体层周围形成栅极电介质膜和栅电极; 在所述柱状第一导电型半导体层的侧壁的上部区域上形成与所述栅极的顶部接触的侧壁状的电介质膜; 在所述浇口的侧壁上形成侧壁状的电介质膜; 以及在柱状第一导电型半导体层的上部和形成在柱状的第一导电型半导体层下方的第二导电型半导体层上形成第二导电型半导体层。