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公开(公告)号：US20140147955A1
公开(公告)日：2014-05-29
申请号：US14093348
申请日：2013-11-29
IPC分类号： B81C1/00
CPC分类号： B81C1/00293 , B81C2203/0136 , B81C2203/0145
摘要： A method for encapsulating a micro-electromechanical (MEMS) device, the method comprising: providing a sacrificial layer arrangement over the MEMS device; providing a first encapsulation layer over the sacrificial layer arrangement, the first encapsulation layer defining at least one aperture; providing a second encapsulation layer over the at least one aperture, the second encapsulation layer being provided to allow removal of the sacrificial layer arrangement around the second encapsulation layer; and removing the sacrificial layer arrangement through the at least one aperture to allow the second encapsulation layer to cover the at least one aperture thereby encapsulating the MEMS device.
摘要翻译： 一种用于封装微机电（MEMS）器件的方法，所述方法包括：在所述MEMS器件上提供牺牲层布置; 在所述牺牲层布置上提供第一封装层，所述第一封装层限定至少一个孔; 在所述至少一个孔上提供第二封装层，所述第二封装层被提供以允许去除所述第二封装层周围的所述牺牲层布置; 以及通过所述至少一个孔去除所述牺牲层布置，以允许所述第二封装层覆盖所述至少一个孔，从而封装所述MEMS器件。
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公开(公告)号：US20130020631A1
公开(公告)日：2013-01-24
申请号：US13531792
申请日：2012-06-25
申请人： Vincent Pott , Navab Singh
发明人： Vincent Pott , Navab Singh
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L27/1052 , G11C23/00 , H01L29/685
摘要： A memory cell and a method of manufacturing a memory cell are provided. The memory cell includes a substrate; at least one first electrode disposed above the substrate; at least one second electrode disposed above the at least one first electrode; a moveable electrode disposed between the at least one first electrode and the at least one second electrode; wherein the moveable electrode is configured to move between the at least one first electrode and the at least one second electrode; wherein the moveable electrode comprises metal.
摘要翻译： 提供了存储单元和制造存储单元的方法。 存储单元包括基板; 设置在所述基板上方的至少一个第一电极; 设置在所述至少一个第一电极上方的至少一个第二电极; 设置在所述至少一个第一电极和所述至少一个第二电极之间的可移动电极; 其中所述可移动电极被配置为在所述至少一个第一电极和所述至少一个第二电极之间移动; 其中所述可移动电极包括金属。
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3.发明授权公开(公告)号：US08236595B2
公开(公告)日：2012-08-07
申请号：US12376993
申请日：2006-08-11
IPC分类号： H01L21/00
CPC分类号： B01J19/0046 , B01J2219/00497 , B01J2219/00527 , B01J2219/00585 , B01J2219/00596 , B01J2219/00612 , B01J2219/00653 , B01J2219/00659 , B01J2219/00677 , B01J2219/00722 , B01J2219/00725 , B01J2219/00729 , B81B2201/0214 , B81B2203/0338 , B81B2207/07 , B81C1/00119 , B82Y15/00 , C40B60/12 , Y10S977/957 , Y10S977/958
摘要： A method of fabricating a sensor comprising a nanowire on a support substrate with a first semiconductor layer arranged on the support substrate is disclosed. The method comprises forming a fin structure from the first semiconductor layer, the fin structure comprising at least two supporting portions and a fin portion arranged there between; oxidizing at least the fin portion of the fin structure thereby forming the nanowire being surrounded by a first layer of oxide; and forming an insulating layer above the supporting portions; wherein the supporting portions and the first insulating layer form a microfluidic channel. A nanowire sensor is also disclosed. The nanowire sensor comprises a support substrate, a semiconducting fin structure arranged on the support substrate, the fin structure comprising at least two semiconducting supporting portions and a nanowire arranged there between; and a first insulating layer on a contact surface of the supporting portions; wherein the supporting portions and the first insulating layer form a microfluidic channel.
摘要翻译： 公开了一种制造包括在支撑衬底上的纳米线的传感器的方法，其中第一半导体层布置在支撑衬底上。 该方法包括从第一半导体层形成翅片结构，鳍结构包括至少两个支撑部分和布置在其间的翅片部分; 至少氧化翅片结构的翅片部分，从而形成由第一氧化物层包围的纳米线; 以及在所述支撑部分上方形成绝缘层; 其中所述支撑部分和所述第一绝缘层形成微流体通道。 还公开了一种纳米线传感器。 纳米线传感器包括支撑衬底，布置在支撑衬底上的半导体翅片结构，鳍结构包括至少两个半导电支撑部分和布置在其上的纳米线; 以及在所述支撑部分的接触表面上的第一绝缘层; 其中所述支撑部分和所述第一绝缘层形成微流体通道。
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公开(公告)号：US08519475B2
公开(公告)日：2013-08-27
申请号：US13289742
申请日：2011-11-04
申请人： Fujio Masuoka , Hiroki Nakamura , Shintaro Arai , Tomohiko Kudo , Navab Singh , Kavitha Devi Buddharaju , Shen Nansheng , Rukmani Devi Sayanthan
发明人： Fujio Masuoka , Hiroki Nakamura , Shintaro Arai , Tomohiko Kudo , Navab Singh , Kavitha Devi Buddharaju , Shen Nansheng , Rukmani Devi Sayanthan
IPC分类号： H01L29/66
CPC分类号： H01L29/7827 , H01L29/42356 , H01L29/42392 , H01L29/458 , H01L29/66666 , H01L29/78642
摘要： A semiconductor device includes a first insulating film formed between a gate electrode and a first flat semiconductor layer, and a sidewall-shaped second insulating film formed to surround an upper sidewall of a first columnar silicon layer while contacting an upper surface of the gate electrode and to surround a sidewall of the gate electrode and the first insulating film. The semiconductor device further includes a metal-semiconductor compound formed on each of an upper surface of a first semiconductor layer of the second conductive type formed in the entirety or the upper portion of the first flat semiconductor layer, and an upper surface of the second semiconductor layer of the second conductive type formed in the upper portion of the first columnar semiconductor layer.
摘要翻译： 半导体器件包括形成在栅极电极和第一平坦半导体层之间的第一绝缘膜，以及侧壁形状的第二绝缘膜，其形成为围绕第一柱状硅层的上侧壁，同时接触栅电极的上表面和 以围绕栅电极和第一绝缘膜的侧壁。 半导体器件还包括形成在第一导电类型的第一半导体层的上表面上的第一半导体层的整体或上部形成的金属半导体化合物和第二半导体的上表面 形成在第一柱状半导体层的上部的第二导电类型的层。
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公开(公告)号：US20110018053A1
公开(公告)日：2011-01-27
申请号：US12746401
申请日：2007-12-07
申请人： Guo Qiang Patrick Lo , Jia Fu , Mingbin Yu , Navab Singh
发明人： Guo Qiang Patrick Lo , Jia Fu , Mingbin Yu , Navab Singh
IPC分类号： H01L29/792 , H01L21/28
CPC分类号： H01L29/0665 , B82Y10/00 , G11C16/10 , G11C2216/06 , H01L29/0673 , H01L29/40117 , H01L29/42348 , H01L29/66833 , H01L29/775 , H01L29/792
摘要： A memory cell is provided. The memory cell comprises a first wire shaped channel structure; and a charge trapping structure surrounding the perimeter surface of the first wire shaped channel structure, the charge trapping structure comprising two charge trapping partial to structures, wherein each charge trapping partial structure is formed of a different material capable of storing electrical charges. Methods of manufacturing the memory cell are also provided.
摘要翻译： 提供存储单元。 存储单元包括第一线形通道结构; 以及围绕第一线形沟道结构的周边表面的电荷捕获结构，电荷捕获结构包括两个电荷俘获部分结构，其中每个电荷捕获部分结构由能够存储电荷的不同材料形成。 还提供了制造存储单元的方法。
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公开(公告)号：US20110012090A1
公开(公告)日：2011-01-20
申请号：US12746347
申请日：2007-12-07
申请人： Navab Singh , Jiang Yu , Guo Qiang Patrick Lo
发明人： Navab Singh , Jiang Yu , Guo Qiang Patrick Lo
IPC分类号： H01L29/775 , H01L21/64 , H01L21/335 , H01L21/04 , H01L29/737
CPC分类号： H01L29/0665 , B82Y10/00 , H01L21/02381 , H01L21/02532 , H01L21/02603 , H01L21/02639 , H01L29/0673 , H01L29/068 , H01L29/1608 , H01L29/20 , H01L29/40117 , H01L29/4234 , H01L29/7831 , H01L29/792
摘要： A silicon-germanium nanowire structure arranged on a support substrate is disclosed, The silicon-germanium nanowire structure includes at least one germanium-containing supporting portion arranged on the support substrate, at least one germanium-containing nanowire disposed above the support substrate and arranged adjacent the at least one germanium-containing supporting portion, wherein germanium concentration of the at least one germanium-containing nanowire is higher than the at least one germanium-containing supporting portion. A transistor comprising the silicon-germanium nanowire structure arranged on a support substrate is also provided. A method of forming a silicon-germanium nanowire structure arranged on a support substrate and a method of forming a transistor comprising forming the silicon-germanium nanowire structure arranged on a support substrate are also disclosed.
摘要翻译： 公开了布置在支撑衬底上的硅 - 锗纳米线结构。硅 - 锗纳米线结构包括至少一个配置在支撑衬底上的含锗支撑部分，至少一个含锗纳米线设置在支撑衬底上方并且邻近 所述至少一个含锗支持部分，其中所述至少一种含锗纳米线的锗浓度高于所述至少一种含锗支撑部分。 还提供了包括布置在支撑衬底上的硅 - 锗纳米线结构的晶体管。 还公开了一种形成布置在支撑衬底上的硅 - 锗纳米线结构的方法以及形成包括形成布置在支撑衬底上的硅 - 锗纳米线结构的晶体管的方法。
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公开(公告)号：US09165932B2
公开(公告)日：2015-10-20
申请号：US13531792
申请日：2012-06-25
申请人： Vincent Pott , Navab Singh
发明人： Vincent Pott , Navab Singh
IPC分类号： H01L29/76 , H01L27/105 , H01L29/68 , G11C23/00
CPC分类号： H01L27/1052 , G11C23/00 , H01L29/685
摘要： A memory cell and a method of manufacturing a memory cell are provided. The memory cell includes a substrate; at least one first electrode disposed above the substrate; at least one second electrode disposed above the at least one first electrode; a moveable electrode disposed between the at least one first electrode and the at least one second electrode; wherein the moveable electrode is configured to move between the at least one first electrode and the at least one second electrode; wherein the moveable electrode comprises metal.
摘要翻译： 提供了存储单元和制造存储单元的方法。 存储单元包括基板; 设置在所述基板上方的至少一个第一电极; 设置在所述至少一个第一电极上方的至少一个第二电极; 设置在所述至少一个第一电极和所述至少一个第二电极之间的可移动电极; 其中所述可移动电极被配置为在所述至少一个第一电极和所述至少一个第二电极之间移动; 其中所述可移动电极包括金属。
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公开(公告)号：US20120138437A1
公开(公告)日：2012-06-07
申请号：US13373123
申请日：2011-11-03
CPC分类号： H01H1/0094 , G11C13/025 , G11C2213/16 , H01H59/0009
摘要： Embodiments provide a switching device. The switching device includes a substrate, which includes a contact region. The switching device further includes a vertical layer arrangement extending from the substrate next to the contact region. The vertical layer arrangement includes a control layer. The switching device further includes a freestanding silicon cantilever extending vertically from the contact region.
摘要翻译： 实施例提供一种切换装置。 开关装置包括基板，其包括接触区域。 开关装置还包括从衬底延伸到接触区域的垂直层布置。 垂直层布置包括控制层。 开关装置还包括从接触区域垂直延伸的独立的硅悬臂。
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公开(公告)号：US20110303973A1
公开(公告)日：2011-12-15
申请号：US13116506
申请日：2011-05-26
申请人： Fujio Masuoka , Hiroki Nakamura , Shintaro Arai , Tomohiko Kudo , King-Jien Chui , Yisuo Li , Yu Jiang , Xiang Li , Zhixian Chen , Nansheng Shen , Vladimir Bliznetsov , Kavitha Devi Buddharaju , Navab Singh
发明人： Fujio Masuoka , Hiroki Nakamura , Shintaro Arai , Tomohiko Kudo , King-Jien Chui , Yisuo Li , Yu Jiang , Xiang Li , Zhixian Chen , Nansheng Shen , Vladimir Bliznetsov , Kavitha Devi Buddharaju , Navab Singh
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/42392 , H01L21/26586 , H01L21/823814 , H01L21/823828 , H01L21/823871 , H01L21/823885 , H01L27/088 , H01L27/092 , H01L29/42384 , H01L29/4908 , H01L29/4958 , H01L29/66666 , H01L29/66772 , H01L29/78618 , H01L29/78642 , H01L29/78696
摘要： The semiconductor device according to the present invention is an nMOS SGT and is composed of a first n+ type silicon layer, a first gate electrode containing metal and a second n+ type silicon layer arranged on the surface of a first columnar silicon layer positioned vertically on a first planar silicon layer. Furthermore, a first insulating film is positioned between the first gate electrode and the first planar silicon layer, and a second insulating film is positioned on the top surface of the first gate electrode. In addition, the first gate electrode containing metal is surrounded by the first n+ type silicon layer, the second n+ type silicon layer, the first insulating film and the second insulating film.
摘要翻译： 根据本发明的半导体器件是nMOS SGT，并且由第一n +型硅层，含有金属的第一栅电极和第二n +型硅层构成，所述第二n +型硅层布置在垂直定位在第一n +型硅层上的第一柱状硅层的表面上 第一平面硅层。 此外，第一绝缘膜位于第一栅电极和第一平面硅层之间，第二绝缘膜位于第一栅电极的顶表面上。 此外，含有第一栅电极的金属被第一n +型硅层，第二n +型硅层，第一绝缘膜和第二绝缘膜包围。
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10.发明申请公开(公告)号：US20110193183A1
公开(公告)日：2011-08-11
申请号：US12376993
申请日：2006-08-11
CPC分类号： B01J19/0046 , B01J2219/00497 , B01J2219/00527 , B01J2219/00585 , B01J2219/00596 , B01J2219/00612 , B01J2219/00653 , B01J2219/00659 , B01J2219/00677 , B01J2219/00722 , B01J2219/00725 , B01J2219/00729 , B81B2201/0214 , B81B2203/0338 , B81B2207/07 , B81C1/00119 , B82Y15/00 , C40B60/12 , Y10S977/957 , Y10S977/958
摘要： A method of fabricating a sensor comprising a nanowire on a support substrate with a first semiconductor layer arranged on the support substrate is disclosed. The method comprises forming a fin structure from the first semiconductor layer, the fin structure comprising at least two supporting portions and a fin portion arranged there between; oxidizing at least the fin portion of the fin structure thereby forming the nanowire being surrounded by a first layer of oxide; and forming an insulating layer above the supporting portions; wherein the supporting portions and the first insulating layer form a microfluidic channel. A nanowire sensor is also disclosed. The nanowire sensor comprises a support substrate, a semiconducting fin structure arranged on the support substrate, the fin structure comprising at least two semiconducting supporting portions and a nanowire arranged there between; and a first insulating layer on a contact surface of the supporting portions; wherein the supporting portions and the first insulating layer form a microfluidic channel.
摘要翻译： 公开了一种制造包括在支撑衬底上的纳米线的传感器的方法，其中第一半导体层布置在支撑衬底上。 该方法包括从第一半导体层形成翅片结构，鳍结构包括至少两个支撑部分和布置在其间的翅片部分; 至少氧化翅片结构的翅片部分，从而形成由第一氧化物层包围的纳米线; 以及在所述支撑部分上方形成绝缘层; 其中所述支撑部分和所述第一绝缘层形成微流体通道。 还公开了一种纳米线传感器。 纳米线传感器包括支撑衬底，布置在支撑衬底上的半导体翅片结构，鳍结构包括至少两个半导电支撑部分和布置在其上的纳米线; 以及在所述支撑部分的接触表面上的第一绝缘层; 其中所述支撑部分和所述第一绝缘层形成微流体通道。
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