公开(公告)号：US20130149804A1

公开(公告)日：2013-06-13

申请号：US13748469

申请日：2013-01-23

申请人： Furukawa Electric Co., Ltd.

发明人： Junji Yoshida ,  Naoki Tsukiji ,  Hidehiro Taniguchi ,  Satosho Irino ,  Hirokazu Itoh ,  Harunobu Ikeda ,  Masako Kobayakawa ,  Akihiko Kasukawa

IPC分类号： H01L33/60

CPC分类号： H01L33/60 ,  B82Y20/00 ,  H01L2924/0002 ,  H01S5/02284 ,  H01S5/02415 ,  H01S5/02438 ,  H01S5/2206 ,  H01S5/2222 ,  H01S5/2275 ,  H01S5/3406 ,  H01S5/3434 ,  H01L2924/00

摘要： A semiconductor device of the invention is formed so that n-type InP current blocking layers enter the inside of p-type InP cladding layers, i.e., the n-type current blocking layers ride over the upper part of the p-type InP cladding layers, so that a distance between the n-type InP current block layers composing a current blocking region is narrower than a width of the p-type cladding layers contacting with the n-type InP current blocking layers. Thereby, the semiconductor device whose leak current in the current blocking region may be reduced which permits high-output and high-temperature operations may be readily fabricated.

摘要翻译： 本发明的半导体器件形成为使n型InP电流阻挡层进入p型InP包覆层的内部，即，n型电流阻挡层越过p型InP包覆层的上部 使得构成电流阻挡区域的n型InP电流阻挡层之间的距离比与n型InP电流阻挡层接触的p型覆层的宽度窄。 因此，可以容易地制造其电流阻挡区域中的漏电流可以减小的半导体器件，其允许高输出和高温操作。