公开(公告)号：US20170117861A1

公开(公告)日：2017-04-27

申请号：US14920671

申请日：2015-10-22

Applicant: Futurewei Technologies, Inc.

Inventor： Kent Jaeger ,  Zhihang Zhang ,  Matthew Miller ,  Ramesh Chadalawada

IPC: H03G3/30 ,  H04B1/40 ,  H04B17/21 ,  H03F3/195

CPC classification number: H04B17/21 ,  H03F3/195 ,  H03F3/45475 ,  H03F3/45973 ,  H03F2200/294 ,  H03F2200/375 ,  H03F2200/451 ,  H03F2203/45512 ,  H03F2203/45526 ,  H03F2203/45528 ,  H03F2203/45591 ,  H03F2203/45594 ,  H03G1/0035 ,  H03G1/0088 ,  H04B1/30 ,  H04B1/40 ,  H04B2001/305

Abstract: An embodiment method includes measuring, by a calibration device, a first output voltage of a variable gain amplifier (VGA) when the VGA is set at a first gain setting and measuring, by a calibration device, a second output voltage of the VGA when the VGA is set at a second gain setting different from the first gain setting. The method further includes calculating, by the calibration device, an offset voltage of a signal path including the VGA using the first output voltage and the second output voltage and calculating, by the calibration device, an internal offset voltage of the VGA using the first output voltage and the second output voltage.

公开(公告)号：US10678296B2

公开(公告)日：2020-06-09

申请号：US16054886

申请日：2018-08-03

Applicant: Futurewei Technologies, Inc.

Inventor： Lawrence E Connell ,  Timothy McHugh ,  Ramesh Chadalawada ,  Brian Iehl

IPC: G06F1/08 ,  H04B1/04 ,  G06F1/06 ,  H03K5/151

Abstract: The disclosure relates to technology for generating multi-phase signals. An apparatus includes 2{circumflex over ( )}n phase signal generation stages. The apparatus also includes a controller configured to provide a mode input of each of the 2{circumflex over ( )}n stages with an active periodic binary signal with remaining inputs of each of the 2{circumflex over ( )}n stages provided with another periodic binary signal to collectively generate a 2{circumflex over ( )}n phase signal in a first mode. The controller is further configured to provide the mode input of each of 2{circumflex over ( )}(n−1) odd stages with a first steady state signal and the mode input of each of 2{circumflex over ( )}(n−1) even stages with a second steady state signal with remaining inputs of each of the 2{circumflex over ( )}n stages provided with the same periodic binary signal as in the first mode to cause either the 2{circumflex over ( )}(n−1) odd stages or the 2{circumflex over ( )}(n−1) even stages to collectively generate a 2{circumflex over ( )}(n−1) phase signal in a second mode.

公开(公告)号：US20200042031A1

公开(公告)日：2020-02-06

申请号：US16054886

申请日：2018-08-03

Applicant: Futurewei Technologies, Inc.

Inventor： Lawrence E Connell ,  Timothy McHugh ,  Ramesh Chadalawada ,  Brian Iehl

IPC: G06F1/08 ,  H03K5/151 ,  G06F1/06 ,  H04B1/04

Abstract: The disclosure relates to technology for generating multi-phase signals. An apparatus includes 2{circumflex over ( )}n phase signal generation stages. The apparatus also includes a controller configured to provide a mode input of each of the 2{circumflex over ( )}n stages with an active periodic binary signal with remaining inputs of each of the 2{circumflex over ( )}n stages provided with another periodic binary signal to collectively generate a 2{circumflex over ( )}n phase signal in a first mode. The controller is further configured to provide the mode input of each of 2{circumflex over ( )}(n−1) odd stages with a first steady state signal and the mode input of each of 2{circumflex over ( )}(n−1) even stages with a second steady state signal with remaining inputs of each of the 2{circumflex over ( )}n stages provided with the same periodic binary signal as in the first mode to cause either the 2{circumflex over ( )}(n−1) odd stages or the 2{circumflex over ( )}(n−1) even stages to collectively generate a 2{circumflex over ( )}(n−1) phase signal in a second mode.

公开(公告)号：US09647622B1

公开(公告)日：2017-05-09

申请号：US14920671

申请日：2015-10-22

Applicant: Futurewei Technologies, Inc.

Inventor： Kent Jaeger ,  Zhihang Zhang ,  Matthew Miller ,  Ramesh Chadalawada

IPC: H03G3/20 ,  H03G3/30 ,  H03F3/195 ,  H04B1/40 ,  H04B17/21

CPC classification number: H04B17/21 ,  H03F3/195 ,  H03F3/45475 ,  H03F3/45973 ,  H03F2200/294 ,  H03F2200/375 ,  H03F2200/451 ,  H03F2203/45512 ,  H03F2203/45526 ,  H03F2203/45528 ,  H03F2203/45591 ,  H03F2203/45594 ,  H03G1/0035 ,  H03G1/0088 ,  H04B1/30 ,  H04B1/40 ,  H04B2001/305

Abstract: An embodiment method includes measuring, by a calibration device, a first output voltage of a variable gain amplifier (VGA) when the VGA is set at a first gain setting and measuring, by a calibration device, a second output voltage of the VGA when the VGA is set at a second gain setting different from the first gain setting. The method further includes calculating, by the calibration device, an offset voltage of a signal path including the VGA using the first output voltage and the second output voltage and calculating, by the calibration device, an internal offset voltage of the VGA using the first output voltage and the second output voltage.