公开(公告)号：US09825094B2

公开(公告)日：2017-11-21

申请号：US14953702

申请日：2015-11-30

Applicant: GLOBALFOUNDRIES INC.

Inventor： Chung H. Lam ,  Chung-Hsun Lin ,  Darsen D. Lu ,  Philip J. Oldiges

IPC: H01L29/66 ,  H01L27/24 ,  H01L21/311 ,  H01L21/8234 ,  H01L29/423 ,  H01L29/78 ,  H01L45/00 ,  H01L29/417 ,  H01L29/08

CPC classification number: H01L27/2436 ,  H01L21/31105 ,  H01L21/823431 ,  H01L21/823456 ,  H01L29/0847 ,  H01L29/41791 ,  H01L29/42376 ,  H01L29/66795 ,  H01L29/66803 ,  H01L29/785 ,  H01L45/06

Abstract: Embodiments are directed to a method of forming portions of a fin-type field effect transistor (FinFET) device. The method includes forming at least one source region having multiple sides, forming at least one drain region having multiple sides, forming at least one channel region having multiple sides, forming at least one gate region around the multiple sides of the at least one channel region and forming the at least one gate region around the multiple sides of the at least one drain region.

公开(公告)号：US09825093B2

公开(公告)日：2017-11-21

申请号：US14832108

申请日：2015-08-21

Applicant: GLOBALFOUNDRIES INC.

Inventor： Chung H. Lam ,  Chung-Hsun Lin ,  Darsen D. Lu ,  Philip J. Oldiges

IPC: H01L27/24 ,  H01L29/08 ,  H01L45/00 ,  H01L29/417 ,  H01L29/66 ,  H01L29/78 ,  H01L21/311 ,  H01L21/8234 ,  H01L29/423

CPC classification number: H01L27/2436 ,  H01L21/31105 ,  H01L21/823431 ,  H01L21/823456 ,  H01L29/0847 ,  H01L29/41791 ,  H01L29/42376 ,  H01L29/66795 ,  H01L29/66803 ,  H01L29/785 ,  H01L45/06

Abstract: Embodiments are directed to a method of forming portions of a fin-type field effect transistor (FinFET) device. The method includes forming at least one source region having multiple sides, forming at least one drain region having multiple sides, forming at least one channel region having multiple sides, forming at least one gate region around the multiple sides of the at least one channel region and forming the at least one gate region around the multiple sides of the at least one drain region.

公开(公告)号：US20170053966A1

公开(公告)日：2017-02-23

申请号：US14832108

申请日：2015-08-21

Applicant: GLOBALFOUNDRIES INC.

Inventor： Chung H. Lam ,  Chung-Hsun Lin ,  Darsen D. Lu ,  Philip J. Oldiges

IPC: H01L27/24 ,  H01L29/08 ,  H01L45/00 ,  H01L29/417 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L27/2436 ,  H01L21/31105 ,  H01L21/823431 ,  H01L21/823456 ,  H01L29/0847 ,  H01L29/41791 ,  H01L29/42376 ,  H01L29/66795 ,  H01L29/66803 ,  H01L29/785 ,  H01L45/06

Abstract: Embodiments are directed to a method of forming portions of a fin-type field effect transistor (FinFET) device. The method includes forming at least one source region having multiple sides, forming at least one drain region having multiple sides, forming at least one channel region having multiple sides, forming at least one gate region around the multiple sides of the at least one channel region and forming the at least one gate region around the multiple sides of the at least one drain region.

Abstract translation: 实施例涉及一种形成鳍型场效应晶体管（FinFET）器件的部分的方法。 该方法包括形成具有多个侧面的至少一个源极区域，形成至少一个具有多个边的漏极区域，形成具有多个边的至少一个沟道区域，在该至少一个沟道区域的多个边缘周围形成至少一个栅极区域 以及在所述至少一个漏极区域的所述多个侧面周围形成所述至少一个栅极区域。

公开(公告)号：US09525027B2

公开(公告)日：2016-12-20

申请号：US14208518

申请日：2014-03-13

Applicant: GLOBALFOUNDRIES INC.

Inventor： Pouya Hashemi ,  Ali Khakifirooz ,  Darsen D. Lu ,  Alexander Reznicek ,  Dominic J. Schepis

IPC: H01L21/84 ,  H01L29/10 ,  H01L29/66 ,  H01L29/735 ,  H01L21/225 ,  H01L29/417 ,  H01L29/08 ,  H01L21/8249 ,  H01L27/06 ,  H01L29/06 ,  H01L29/423 ,  H01L27/092

CPC classification number: H01L29/1008 ,  H01L21/2254 ,  H01L21/8249 ,  H01L27/0623 ,  H01L27/0924 ,  H01L29/0692 ,  H01L29/0808 ,  H01L29/0821 ,  H01L29/41708 ,  H01L29/4232 ,  H01L29/6625 ,  H01L29/66795 ,  H01L29/735 ,  H01L29/785

Abstract: A lateral bipolar junction transistor is fabricated using a semiconductor-on-insulator substrate. The transistor includes a germanium gradient within a doped silicon base region, there being an increasing germanium content in the direction of the collector region of the transistor. The use of a substrate including parallel silicon fins to fabricate lateral bipolar junction transistors facilitates the inclusion of both CMOS FinFET devices and lateral bipolar junction transistors having graded silicon germanium base regions on the same chip.

Abstract translation: 使用绝缘体上半导体衬底制造横向双极结晶体管。 晶体管包括在掺杂硅基区内的锗梯度，晶体管的集电极区域的方向上锗含量增加。 使用包括平行硅散热片的衬底来制造横向双极结晶体管有助于将CMOS FinFET器件和具有分级硅锗基极区域的横向双极结型晶体管包括在同一芯片上。