公开(公告)号：US20170032929A1

公开(公告)日：2017-02-02

申请号：US14812317

申请日：2015-07-29

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ming LEI ,  Byoung-Gi MIN

IPC: H01J37/22 ,  H01J37/26

CPC classification number: H01L22/00 ,  H01J2237/24564 ,  H01J2237/24592 ,  H01J2237/2817 ,  H01L22/12 ,  H01L22/20

Abstract: A method and apparatus for detecting VC defects and determining the exact shorting locations based on charging dynamics induced by scan direction variation are provided. Embodiments include providing a substrate having at least a partially formed device thereon, the partially formed device having at least a word-line, a share contact, and a bit-line; performing a first EBI on the at least partially formed device in a single direction; classifying defects by ADC based on the first EBI inspection; selecting DOI among the classified defects for further review; performing a second EBI on the DOI in a first, second, third, and fourth direction; comparing a result of the first direction against a result of the second direction and/or a result of the third direction against a result of the fourth direction; and determining a shorting location for each DOI based on the one or more comparisons.

Abstract translation: 提供了一种用于检测VC缺陷并基于由扫描方向变化引起的充电动态确定精确的短路位置的方法和装置。 实施例包括提供其上至少具有部分形成的器件的衬底，部分形成的器件至少具有字线，共用触点和位线; 在单个方向上在所述至少部分形成的装置上执行第一EBI; 根据第一次EBI检查对ADC进行分类缺陷; 在分类缺陷中选择DOI进行进一步审查; 在第一，第二，第三和第四方向上对DOI执行第二EBI; 将第一方向的结果与第二方向的结果和/或第三方向的结果相对于第四方向的结果进行比较; 以及基于所述一个或多个比较确定每个DOI的短路位置。

公开(公告)号：US20160163859A1

公开(公告)日：2016-06-09

申请号：US14560428

申请日：2014-12-04

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Xusheng WU ,  Hongxiang MO ,  Qi ZHANG ,  Byoung-Gi MIN ,  Jeasung PARK

IPC: H01L29/78 ,  H01L21/306 ,  H01L29/66 ,  H01L21/02 ,  H01L29/161 ,  H01L29/165

CPC classification number: H01L29/7848 ,  H01L21/02057 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02247 ,  H01L21/02252 ,  H01L21/0228 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/28194 ,  H01L21/30604 ,  H01L21/823462 ,  H01L29/161 ,  H01L29/165 ,  H01L29/517 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66636

Abstract: Methods of using a nitride to protect source/drain regions during dummy gate removal and the resulting devices are disclosed. Embodiments include forming an oxide layer on a substrate; forming a nitride protection layer on the oxide layer; forming a dummy gate layer on the nitride protection layer; patterning the oxide, nitride, and dummy gate layers forming first and second dummy gate stacks on first and second portions of the substrate, each dummy gate stack comprising a dummy gate, the nitride protection layer, and the oxide layer, wherein a portion of the oxide layer extends along the substrate beyond side edges of the dummy gate; forming first and second source/drain cavities in the substrate at opposite sides of the first and second dummy gate stacks, respectively; growing first and second eSiGe source/drain regions in the first and second source/drain cavities, respectively; and removing the first dummy gate and the second dummy gate stack.

Abstract translation: 公开了在伪栅极去除期间使用氮化物来保护源极/漏极区域的方法以及所得到的器件。 实施例包括在基板上形成氧化物层; 在氧化物层上形成氮化物保护层; 在氮化物保护层上形成虚拟栅极层; 图案化在衬底的第一和第二部分上形成第一和第二虚拟栅极堆叠的氧化物，氮化物和伪栅极层，每个伪栅极堆叠包括伪栅极，氮化物保护层和氧化物层，其中一部分 氧化物层沿着衬底延伸超过虚拟栅极的侧边缘; 在第一和第二伪栅极堆叠的相对侧分别在衬底中形成第一和第二源极/漏极空腔; 分别在第一和第二源极/漏极腔中生长第一和第二eSiGe源极/漏极区域; 以及去除第一伪栅极和第二虚拟栅极堆叠。