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    METHOD OF FORMING A SEMICONDUCTOR DEVICE
    1.
    发明申请
    METHOD OF FORMING A SEMICONDUCTOR DEVICE 有权
    形成半导体器件的方法

    公开(公告)号：US20170069550A1

    公开(公告)日：2017-03-09

    申请号：US14844163

    申请日：2015-09-03

    Applicant: GLOBALFOUNDRIES Inc.

    Inventor： Ran Yan ,  Alban Zaka ,  Pei-Yu Chou

    IPC: H01L21/84 ,  H01L21/8238 ,  H01L21/3105 ,  H01L21/02 ,  H01L21/762 ,  H01L21/311

    CPC classification number: H01L21/823878 ,  H01L21/02164 ,  H01L21/0223 ,  H01L21/02255 ,  H01L21/02532 ,  H01L21/31055 ,  H01L21/76283 ,  H01L21/823807 ,  H01L21/84 ,  H01L27/092

    Abstract: In a first aspect, the present disclosure provides a method of forming a semiconductor device, including providing an SOI structure comprising a base substrate, a buried insulating material layer formed on the base substrate and an active semiconductor layer formed on the buried insulating structure, forming a germanium-comprising layer on an exposed surface of the active semiconductor layer, forming a trench isolation structure, the trench isolation structure extending through the germanium-comprising layer and the active semiconductor layer, performing an annealing process after the trench isolation structure is formed, the annealing process resulting in an oxide layer disposed on a germanium-comprising active layer which is formed on the buried insulating material layer, and removing the oxide layer for exposing an upper surface of the germanium-comprising active layer.

    Abstract translation: 在第一方面，本公开内容提供了一种形成半导体器件的方法，包括提供SOI结构，其包括基底基板，形成在基底基板上的掩埋绝缘材料层和形成在掩埋绝缘结构上的有源半导体层，形成 在有源半导体层的暴露表面上的含锗层，形成沟槽隔离结构，所述沟槽隔离结构延伸穿过含锗层和有源半导体层，在形成沟槽隔离结构之后进行退火处理， 所述退火工艺导致设置在形成在所述掩埋绝缘材料层上的含锗活性层上的氧化物层，以及去除所述氧化物层以暴露所述含锗活性层的上表面。

    EPITAXIAL SEMICONDUCTOR MATERIAL GROWN WITH ENHANCED LOCAL ISOTROPY
    3.
    发明申请
    EPITAXIAL SEMICONDUCTOR MATERIAL GROWN WITH ENHANCED LOCAL ISOTROPY 审中-公开

    公开(公告)号：US20200111870A1

    公开(公告)日：2020-04-09

    申请号：US16151938

    申请日：2018-10-04

    Applicant: GLOBALFOUNDRIES Inc.

    Inventor： Omur Isil Aydin ,  Judson Holt ,  Lakshmanan Vanamurthy ,  Tobias Heyne ,  Pei-Yu Chou ,  Cäcilia Brantz

    IPC: H01L29/08 ,  H01L21/84 ,  H01L27/12 ,  H01L29/04 ,  H01L21/02

    Abstract: Structures for a field-effect transistor and methods for fabricating a structure for a field-effect transistor. A first epitaxial layer has a first surface and a second surface inclined relative to the first surface. A surface layer is arranged on the first and second surfaces of the first epitaxial layer. A second epitaxial layer is arranged over the surface layer on the first and second surfaces of the first epitaxial layer. A portion of the first epitaxial layer defines an interface with the surface layer. The portion of the first epitaxial layer contains a first concentration of a dopant. The surface layer contains a second concentration of the dopant that is greater than the first concentration of the dopant in the portion of the first epitaxial layer.

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