Methods of forming nanowire devices with spacers and the resulting devices
    1.
    发明授权
    Methods of forming nanowire devices with spacers and the resulting devices 有权
    用间隔物形成纳米线器件的方法和所得到的器件

    公开(公告)号:US09431512B2

    公开(公告)日:2016-08-30

    申请号:US14308257

    申请日:2014-06-18

    Abstract: A method of forming a nanowire device includes forming semiconductor material layers above a semiconductor substrate, forming a gate structure above the semiconductor material layers, forming a first sidewall spacer adjacent to the gate structure and forming a second sidewall spacer adjacent to the first sidewall spacer. The method further includes patterning the semiconductor material layers such that each layer has first and second exposed end surfaces. The gate structure, the first sidewall spacer, and the second sidewall spacer are used in combination as an etch mask during the patterning process. The method further includes removing the first and second sidewall spacers, thereby exposing at least a portion of the patterned semiconductor material layers. The method further includes forming doped extension regions in at least the exposed portions of the patterned semiconductor material layers after removing the first and second sidewall spacers.

    Abstract translation: 形成纳米线器件的方法包括在半导体衬底之上形成半导体材料层,在半导体材料层之上形成栅极结构,形成与栅极结构相邻的第一侧壁间隔物,并形成邻近第一侧壁间隔物的第二侧壁间隔物。 该方法还包括使半导体材料层图案化,使得每个层具有第一和第二暴露的端表面。 栅极结构,第一侧壁间隔件和第二侧壁间隔件在图案化工艺期间被组合用作蚀刻掩模。 该方法还包括去除第一和第二侧壁间隔物,从而暴露图案化的半导体材料层的至少一部分。 该方法还包括在除去第一和第二侧壁间隔物之后,在至少图案化的半导体材料层的暴露部分中形成掺杂的延伸区域。

    METHODS OF FORMING NANOWIRE DEVICES WITH SPACERS AND THE RESULTING DEVICES
    5.
    发明申请
    METHODS OF FORMING NANOWIRE DEVICES WITH SPACERS AND THE RESULTING DEVICES 有权
    形成具有间隔器和结果器件的纳米器件的方法

    公开(公告)号:US20150372111A1

    公开(公告)日:2015-12-24

    申请号:US14308257

    申请日:2014-06-18

    Abstract: A method of forming a nanowire device includes forming semiconductor material layers above a semiconductor substrate, forming a gate structure above the semiconductor material layers, forming a first sidewall spacer adjacent to the gate structure and forming a second sidewall spacer adjacent to the first sidewall spacer. The method further includes patterning the semiconductor material layers such that each layer has first and second exposed end surfaces. The gate structure, the first sidewall spacer, and the second sidewall spacer are used in combination as an etch mask during the patterning process. The method further includes removing the first and second sidewall spacers, thereby exposing at least a portion of the patterned semiconductor material layers. The method further includes forming doped extension regions in at least the exposed portions of the patterned semiconductor material layers after removing the first and second sidewall spacers.

    Abstract translation: 形成纳米线器件的方法包括在半导体衬底之上形成半导体材料层,在半导体材料层之上形成栅极结构,形成与栅极结构相邻的第一侧壁间隔物,并形成邻近第一侧壁间隔物的第二侧壁间隔物。 该方法还包括使半导体材料层图案化,使得每个层具有第一和第二暴露的端表面。 栅极结构,第一侧壁间隔件和第二侧壁间隔件在图案化工艺期间被组合用作蚀刻掩模。 该方法还包括去除第一和第二侧壁间隔物,从而暴露图案化的半导体材料层的至少一部分。 该方法还包括在除去第一和第二侧壁间隔物之后,在至少图案化的半导体材料层的暴露部分中形成掺杂的延伸区域。

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