公开(公告)号：US20170186852A1

公开(公告)日：2017-06-29

申请号：US14981980

申请日：2015-12-29

Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.

Inventor： Xueming Dexter TAN ,  Kiok Boone Elgin QUEK ,  Xinfu LIU

IPC: H01L29/66 ,  H01L21/266 ,  H01L21/265 ,  H01L29/06 ,  H01L29/10

CPC classification number: H01L29/66575 ,  H01L21/26506 ,  H01L21/26513 ,  H01L29/105 ,  H01L29/167 ,  H01L29/6659

Abstract: A device and a method for forming a device are disclosed. The method includes providing a substrate prepared with a device region. A device well having second polarity type dopants is formed in the substrate. A threshold voltage (VT) implant is performed with a desired level of second polarity type dopants into the substrate. The VT implant forms a VT adjust region to obtain a desired VT of a transistor. A co-implantation with diffusion suppression material is performed to form a diffusion suppression (DS) region in the substrate. The DS region reduces or prevents segregation and out-diffusion of the VT implanted second polarity type dopants. A transistor of a first polarity type having a gate is formed in the device region. First and second diffusion regions are formed adjacent to sidewalls of the gate.

公开(公告)号：US20190140079A1

公开(公告)日：2019-05-09

申请号：US16228797

申请日：2018-12-21

Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.

Inventor： Xueming Dexter TAN ,  Kiok Boone Elgin QUEK ,  Xinfu LIU

IPC: H01L29/66 ,  H01L29/10 ,  H01L21/265

CPC classification number: H01L29/66575 ,  H01L21/26506 ,  H01L21/26513 ,  H01L29/105 ,  H01L29/167 ,  H01L29/6659

Abstract: A device and a method for forming a device are disclosed. The method includes providing a substrate prepared with a device region. A device well having second polarity type dopants is formed in the substrate. A threshold voltage (VT) implant is performed with a desired level of second polarity type dopants into the substrate. The VT implant forms a VT adjust region to obtain a desired VT of a transistor. A co-implantation with diffusion suppression material is performed to form a diffusion suppression (DS) region in the substrate. The DS region reduces or prevents segregation and out-diffusion of the VT implanted second polarity type dopants. A transistor of a first polarity type having a gate is formed in the device region. First and second diffusion regions are formed adjacent to sidewalls of the gate.

公开(公告)号：US20170084736A1

公开(公告)日：2017-03-23

申请号：US14856574

申请日：2015-09-17

Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.

Inventor： Eng Huat TOH ,  Xinfu LIU ,  Xueming Dexter TAN

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/66 ,  H01L29/51

CPC classification number: H01L29/7816 ,  H01L27/11582 ,  H01L28/00 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/402 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66484 ,  H01L29/66681 ,  H01L29/7831 ,  H01L29/7833 ,  H01L29/7835

Abstract: High voltage devices and methods for forming a high voltage device are disclosed. The high voltage device includes a substrate prepared with a device isolation region. The device isolation region defines a device region. The device region includes at least first and second source/drain regions and a gate region defined thereon. A device well is disposed in the device region. The device well encompasses the at least first and second source/drain regions. A primary gate and at least one secondary gate adjacent to the primary gate are disposed in the gate region. The at least first and second source/drain regions are displaced from first and second sides of the primary gate.