公开(公告)号：US11569170B2

公开(公告)日：2023-01-31

申请号：US17064602

申请日：2020-10-07

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Siva P. Adusumilli ,  Mark David Levy ,  Ramsey Hazbun ,  Alvin Joseph ,  Steven Bentley

IPC: H01L23/535 ,  H01L21/74 ,  H01L21/768 ,  H01L23/367 ,  H01L23/48 ,  H01L29/10 ,  H01L21/8234 ,  H01L27/092 ,  H01L29/778 ,  H01L29/735

Abstract: A semiconductor device is provided, the semiconductor device comprising a substrate having merged cavities in the substrate. An active region is over the merged cavities in the substrate. A thermally conductive layer is in the merged cavities in the substrate, whereby the thermally conductive layer at least partially fills up the merged cavities in the substrate. A first contact pillar connects the thermally conductive layer in the merged cavities in the substrate with a metallization layer above the active region.

公开(公告)号：US20230154786A1

公开(公告)日：2023-05-18

申请号：US17527716

申请日：2021-11-16

Applicant: GlobalFoundries U.S. Inc.

Inventor： Steven M. Shank ,  Siva P. Adusumilli ,  Alvin Joseph

IPC: H01L21/762 ,  H01L21/02

CPC classification number: H01L21/76297 ,  H01L21/02595

Abstract: Structures for a field-effect transistor and methods of forming a structure for a field-effect transistor. The structure includes a semiconductor substrate having a first trench, and a trench isolation region positioned in the first trench. The trench isolation region contains a dielectric material, the trench isolation region includes a second trench surrounded by the dielectric material, and the trench isolation region includes openings that penetrate through the dielectric material. A semiconductor layer is positioned in the second trench of the trench isolation region. The semiconductor layer contains a single-crystal semiconductor material.

公开(公告)号：US11862511B2

公开(公告)日：2024-01-02

申请号：US17527716

申请日：2021-11-16

Applicant: GlobalFoundries U.S. Inc.

Inventor： Steven M. Shank ,  Siva P. Adusumilli ,  Alvin Joseph

IPC: H01L21/762 ,  H01L21/02

CPC classification number: H01L21/76297 ,  H01L21/02595

Abstract: Structures for a field-effect transistor and methods of forming a structure for a field-effect transistor. The structure includes a semiconductor substrate having a first trench, and a trench isolation region positioned in the first trench. The trench isolation region contains a dielectric material, the trench isolation region includes a second trench surrounded by the dielectric material, and the trench isolation region includes openings that penetrate through the dielectric material. A semiconductor layer is positioned in the second trench of the trench isolation region. The semiconductor layer contains a single-crystal semiconductor material.

公开(公告)号：US20230223254A1

公开(公告)日：2023-07-13

申请号：US17571932

申请日：2022-01-10

Applicant: GlobalFoundries U.S. Inc.

Inventor： Ramsey Hazbun ,  Mark Levy ,  Alvin Joseph ,  Siva P. Adusumilli

IPC: H01L21/02 ,  H01L29/66 ,  H01L29/20 ,  H01L27/085 ,  H01L21/762

CPC classification number: H01L21/0243 ,  H01L21/02381 ,  H01L21/76224 ,  H01L27/085 ,  H01L29/2003 ,  H01L29/66462 ,  H01L21/02433

Abstract: Structures including a compound-semiconductor-based device and a silicon-based device integrated on a semiconductor substrate and methods of forming such structures. The structure includes a first semiconductor layer having a top surface and a faceted surface that fully surrounds the top surface. The top surface has a first surface normal, and the faceted surface has a second surface normal that is inclined relative to the first surface normal. A layer stack that includes second semiconductor layers is positioned on the faceted surface of the first semiconductor layer. Each of the second semiconductor layers contains a compound semiconductor material. A silicon-based device is located on the top surface of the first semiconductor layer, and a compound-semiconductor-based device is located on the layer stack.

公开(公告)号：US11842940B2

公开(公告)日：2023-12-12

申请号：US17156634

申请日：2021-01-25

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Ramsey Hazbun ,  Siva P. Adusumilli ,  Mark David Levy ,  Alvin Joseph

IPC: H01L23/367 ,  H01L21/48

CPC classification number: H01L23/367 ,  H01L21/4882

Abstract: A semiconductor structure is provided. The semiconductor structure comprises a heat generating device arranged over a substrate. An interlayer dielectric (ILD) material may be arranged over the heat generating device and the substrate. A metallization layer may be arranged over the interlayer dielectric material. A thermal shunt structure may be arranged proximal the heat generating device, whereby an upper portion of the thermal shunt structure may be arranged in the interlayer dielectric material and may be lower than the metallization layer, and a lower portion of the thermal shunt structure may be arranged in the substrate.