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公开(公告)号：US20220254774A1
公开(公告)日：2022-08-11
申请号：US17173611
申请日：2021-02-11
发明人： Uzma B. Rana , Vibhor Jain , Anthony K. Stamper , Qizhi Liu , Siva P. Adusumilli
IPC分类号： H01L27/06 , H01L29/66 , H01L21/8249 , H01L29/732
摘要： Aspects of the disclosure provide an integrated circuit (IC) structure with a bipolar transistor stack within a substrate. The bipolar transistor stack may include: a collector, a base on the collector, and an emitter on a first portion of the base. A horizontal width of the emitter is less than a horizontal width of the base, and an upper surface of the emitter is substantially coplanar with an upper surface of the substrate. An extrinsic base structure is on a second portion of the base of the bipolar transistor stack, and horizontally adjacent the emitter. The extrinsic base structure includes an upper surface above the upper surface of the substrate.
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公开(公告)号：US20220190108A1
公开(公告)日：2022-06-16
申请号：US17155469
申请日：2021-01-22
摘要： A transistor includes a bulk semiconductor substrate, and a first source/drain region in the bulk semiconductor substrate separated from a second source/drain region in the bulk semiconductor substrate by a channel region. A first air gap is defined in the bulk semiconductor substrate under the first source/drain region, and a second air gap is defined in the bulk semiconductor substrate under the second source/drain region. A gate is over the channel region. A spacing between the first air gap and the second air gap is greater than or equal to a length of the channel region such that the first and second air gaps are not under the channel region. The air gaps may have a rectangular cross-sectional shape. The air gaps reduce off capacitance of the bulk semiconductor structure to near semiconductor-on-insulator levels without the disadvantages of an air gap under the channel region.
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公开(公告)号：US20230114096A1
公开(公告)日：2023-04-13
申请号：US17450186
申请日：2021-10-07
摘要： An integrated circuit (IC) structure includes an active device over a bulk semiconductor substrate, and an isolation structure around the active device in the bulk semiconductor substrate. The active device includes a semiconductor layer having a center region, a first end region laterally spaced from the center region by a first trench isolation, a second end region laterally spaced from the center region by a second trench isolation, a gate over the center region, and a source/drain region in each of the first and second end regions. The isolation structure includes: a polycrystalline isolation layer under the active device, a third trench isolation around the active device, and a porous semiconductor layer between the first trench isolation and the polycrystalline isolation layer and between the second trench isolation and the polycrystalline isolation layer.
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公开(公告)号：US20230096544A1
公开(公告)日：2023-03-30
申请号：US17449336
申请日：2021-09-29
IPC分类号： H01L29/06 , H01L29/08 , H01L21/762 , H01L21/763
摘要： A transistor includes a bulk semiconductor substrate, and first and second raised source/drain regions above the bulk semiconductor substrate. A gate is between the first and second raised source/drain regions. A first dielectric section is beneath the first raised source/drain region in the bulk semiconductor substrate, and a second dielectric section is beneath the second raised source/drain region in the bulk semiconductor substrate. A first air gap is defined in at least the first dielectric section under the first raised source/drain region, and a second air gap is defined in at least the second dielectric section under the second raised source/drain region. The air gaps reduce off capacitance of the bulk semiconductor structure to near semiconductor-on-insulator levels without the disadvantages of an air gap under the channel region.
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公开(公告)号：US11605710B2
公开(公告)日：2023-03-14
申请号：US17155469
申请日：2021-01-22
摘要： A transistor includes a bulk semiconductor substrate, and a first source/drain region in the bulk semiconductor substrate separated from a second source/drain region in the bulk semiconductor substrate by a channel region. A first air gap is defined in the bulk semiconductor substrate under the first source/drain region, and a second air gap is defined in the bulk semiconductor substrate under the second source/drain region. A gate is over the channel region. A spacing between the first air gap and the second air gap is greater than or equal to a length of the channel region such that the first and second air gaps are not under the channel region. The air gaps may have a rectangular cross-sectional shape. The air gaps reduce off capacitance of the bulk semiconductor structure to near semiconductor-on-insulator levels without the disadvantages of an air gap under the channel region.
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公开(公告)号：US11488950B2
公开(公告)日：2022-11-01
申请号：US17173611
申请日：2021-02-11
发明人： Uzma B. Rana , Vibhor Jain , Anthony K. Stamper , Qizhi Liu , Siva P. Adusumilli
IPC分类号： H01L27/06 , H01L29/732 , H01L21/8249 , H01L29/66 , H01L29/10 , H01L29/08 , H01L29/737 , H01L29/73
摘要： Aspects of the disclosure provide an integrated circuit (IC) structure with a bipolar transistor stack within a substrate. The bipolar transistor stack may include: a collector, a base on the collector, and an emitter on a first portion of the base. A horizontal width of the emitter is less than a horizontal width of the base, and an upper surface of the emitter is substantially coplanar with an upper surface of the substrate. An extrinsic base structure is on a second portion of the base of the bipolar transistor stack, and horizontally adjacent the emitter. The extrinsic base structure includes an upper surface above the upper surface of the substrate.
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