公开(公告)号：US12243935B2

公开(公告)日：2025-03-04

申请号：US18487114

申请日：2023-10-15

Applicant: GlobalFoundries U.S. Inc.

Inventor： Vibhor Jain ,  Johnatan Avraham Kantarovsky ,  Mark David Levy ,  Ephrem Gebreselasie ,  Yves Ngu ,  Siva P. Adusumilli

IPC: H01L29/778 ,  H01L29/40 ,  H01L29/43 ,  H01L29/49 ,  H01L29/66

Abstract: The present disclosure relates generally to structures in semiconductor devices and methods of forming the same. More particularly, the present disclosure relates to high electron mobility transistor (HEMT) devices having a silicided polysilicon layer. The present disclosure may provide an active region above a substrate, source and drain electrodes in contact with the active region, a gate above the active region, the gate being laterally between the source and drain electrodes, a polysilicon layer above the substrate, and a silicide layer on the polysilicon layer. The active region includes at least two material layers with different band gaps. The polysilicon layer may be configured as an electronic fuse, a resistor, or a diode.

公开(公告)号：US11923446B2

公开(公告)日：2024-03-05

申请号：US17503345

申请日：2021-10-17

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Vibhor Jain ,  Johnatan Avraham Kantarovsky ,  Mark David Levy ,  Ephrem Gebreselasie ,  Yves Ngu ,  Siva P. Adusumilli

IPC: H01L29/778 ,  H01L29/40 ,  H01L29/66 ,  H01L29/49 ,  H01L29/43

CPC classification number: H01L29/7781 ,  H01L29/407 ,  H01L29/435 ,  H01L29/4916 ,  H01L29/4983 ,  H01L29/66431

Abstract: The present disclosure relates generally to structures in semiconductor devices and methods of forming the same. More particularly, the present disclosure relates to high electron mobility transistor (HEMT) devices having a silicided polysilicon layer. The present disclosure may provide an active region above a substrate, source and drain electrodes in contact with the active region, a gate above the active region, the gate being laterally between the source and drain electrodes, a polysilicon layer above the substrate, and a silicide layer on the polysilicon layer. The active region includes at least two material layers with different band gaps. The polysilicon layer may be configured as an electronic fuse, a resistor, or a diode.

公开(公告)号：US12159910B2

公开(公告)日：2024-12-03

申请号：US17671879

申请日：2022-02-15

Applicant: GlobalFoundries U.S. Inc.

Inventor： Uppili Raghunathan ,  Vibhor Jain ,  Sebastian Ventrone ,  Johnatan Kantarovsky ,  Yves Ngu

IPC: H01L29/40 ,  H01L29/06 ,  H01L29/423 ,  H01L29/735

Abstract: Structures with an isolation region and fabrication methods for a structure having an isolation region. The structure includes a semiconductor substrate, a first isolation region surrounding a portion of the semiconductor substrate, a device in the portion of the semiconductor substrate, and a second isolation region surrounding the first isolation region and the portion of the semiconductor substrate.

公开(公告)号：US11545549B2

公开(公告)日：2023-01-03

申请号：US17029667

申请日：2020-09-23

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Steven M. Shank ,  Siva P. Adusumilli ,  Yves Ngu ,  Michael Zierak

IPC: H01L29/10 ,  H01L27/12 ,  H01L29/04 ,  H01L21/763

Abstract: Body-contacted semiconductor structures and methods of forming a body-contacted semiconductor structure. A semiconductor substrate, which contains of a single-crystal semiconductor material, includes a device region and a plurality of body contact regions each comprised of the single-crystal semiconductor material. A polycrystalline layer and polycrystalline regions are formed in the semiconductor substrate. The polycrystalline regions are positioned between the polycrystalline layer and the device region, and the polycrystalline regions have a laterally-spaced arrangement with a gap between each adjacent pair of the polycrystalline regions. One of the plurality of body contact regions is arranged in the gap between each adjacent pair of the polycrystalline regions.

公开(公告)号：US20230261062A1

公开(公告)日：2023-08-17

申请号：US17671879

申请日：2022-02-15

Applicant: GlobalFoundries U.S. Inc.

Inventor： Uppili Raghunathan ,  Vibhor Jain ,  Sebastian Ventrone ,  Johnatan Kantarovsky ,  Yves Ngu

IPC: H01L29/40 ,  H01L29/735 ,  H01L29/06 ,  H01L29/423

CPC classification number: H01L29/407 ,  H01L29/735 ,  H01L29/0646 ,  H01L29/423 ,  H01L29/401

Abstract: Structures with an isolation region and fabrication methods for a structure having an isolation region. The structure includes a semiconductor substrate, a first isolation region surrounding a portion of the semiconductor substrate, a device in the portion of the semiconductor substrate, and a second isolation region surrounding the first isolation region and the portion of the semiconductor substrate.

公开(公告)号：US20220093744A1

公开(公告)日：2022-03-24

申请号：US17029667

申请日：2020-09-23

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Steven M. Shank ,  Siva P. Adusumilli ,  Yves Ngu ,  Michael Zierak

IPC: H01L29/10 ,  H01L21/763 ,  H01L29/04 ,  H01L27/12

Abstract: Body-contacted semiconductor structures and methods of forming a body-contacted semiconductor structure. A semiconductor substrate, which contains of a single-crystal semiconductor material, includes a device region and a plurality of body contact regions each comprised of the single-crystal semiconductor material. A polycrystalline layer and polycrystalline regions are formed in the semiconductor substrate. The polycrystalline regions are positioned between the polycrystalline layer and the device region, and the polycrystalline regions have a laterally-spaced arrangement with a gap between each adjacent pair of the polycrystalline regions. One of the plurality of body contact regions is arranged in the gap between each adjacent pair of the polycrystalline regions.