公开(公告)号：US08774544B1

公开(公告)日：2014-07-08

申请号：US12842745

申请日：2010-07-23

Applicant: Gabor Szedo ,  Jeffrey D. Stroomer ,  Jose R. Alvarez

Inventor： Gabor Szedo ,  Jeffrey D. Stroomer ,  Jose R. Alvarez

IPC: G06K9/40 ,  H04N5/21

CPC classification number: G06K9/40 ,  G06T5/002 ,  G06T5/50 ,  G06T2207/10016 ,  G06T2207/20012 ,  G06T2207/20182 ,  H04N5/21

Abstract: Circuits, systems, and methods for processing outlier pixels include a spatial filter and a temporal filter. The spatial filter is configured to compute a pixel difference for each pixel as a function of a pixel value of the pixel and pixel values of nearby pixels within each frame. The spatial filter is configured to dynamically add the pixel to a candidate list when the pixel difference exceeds a threshold value. The temporal filter dynamically removes a pixel from the candidate list when there is a divergence of a pixel value of the pixel in successive frames. The temporal filter determines a pixel in the candidate list is an outlier pixel when there is no such divergence in the successive frames.

Abstract translation: 用于处理异常值像素的电路，系统和方法包括空间滤波器和时间滤波器。 空间滤波器被配置为根据像素的像素值和每帧内的附近像素的像素值来计算每个像素的像素差。 空间滤波器被配置为当像素差异超过阈值时，将像素动态地添加到候选列表。 当连续帧中的像素的像素值发散时，时间滤波器从候选列表中动态地去除像素。 当连续帧中没有这样的发散时，时间滤波器确定候选列表中的像素是异常值像素。

公开(公告)号：US09141255B2

公开(公告)日：2015-09-22

申请号：US12974346

申请日：2010-12-21

Applicant: Jeffrey D. Stroomer ,  Jonathan B. Ballagh ,  Roger B. Milne ,  Jeffrey C. Ward ,  Krista M. Marks ,  Thomas E. Fischaber

Inventor： Jeffrey D. Stroomer ,  Jonathan B. Ballagh ,  Roger B. Milne ,  Jeffrey C. Ward ,  Krista M. Marks ,  Thomas E. Fischaber

IPC: G06F3/00 ,  G06F5/00 ,  G06F3/0481

CPC classification number: G06F3/0481

Abstract: Techniques for creating a mosaic using user-created content on a content sharing site. Embodiments of the invention may provide an interface on the content sharing site to allow users to create content. Embodiments may then determine a suitability value between the user-created content and portions of a mosaic, and insert the user-created content into a particular portion of the mosaic based on the determined suitability value for the particular portion.

Abstract translation: 在内容共享网站上使用用户创建的内容创建马赛克的技术。 本发明的实施例可以提供内容共享站点上的接口，以允许用户创建内容。 实施例然后可以确定用户创建的内容和马赛克的部分之间的适合性值，并且基于所确定的特定部分的适用性值将用户创建的内容插入到马赛克的特定部分中。

公开(公告)号：US07797677B1

公开(公告)日：2010-09-14

申请号：US11268801

申请日：2005-11-08

Applicant: Jonathan B. Ballagh ,  Sean A. Kelly ,  Roger B. Milne ,  Shay Ping Seng ,  Jeffrey D. Stroomer

Inventor： Jonathan B. Ballagh ,  Sean A. Kelly ,  Roger B. Milne ,  Shay Ping Seng ,  Jeffrey D. Stroomer

IPC: G06F9/44

CPC classification number: G06F9/543 ,  G06F9/541 ,  G06F17/5054

Abstract: A method of passing data among modules of a heterogeneous software system can include identifying a scripted function to be executed within the heterogeneous software system and building a wrapper script by embedding a call to the scripted function and an XTable object associated with the scripted function within the wrapper script. The method further can include executing the wrapper script thereby causing the scripted function to execute and receiving a result from execution of the scripted function.

Abstract translation: 在异构软件系统的模块之间传递数据的方法可以包括识别要在异构软件系统内执行的脚本化功能，以及通过嵌入对脚本化功能的调用和与脚本化功能相关联的XTable对象来构建包装器脚本 包装脚本 该方法还可以包括执行包装器脚本，从而使脚本化功能执行并从脚本化功能的执行接收结果。

公开(公告)号：US07003751B1

公开(公告)日：2006-02-21

申请号：US10340498

申请日：2003-01-10

Applicant: Jeffrey D. Stroomer ,  Roger B. Milne ,  Jonathan B. Ballagh ,  Haibing Ma ,  L. James Hwang ,  Nabeel Shirazi

Inventor： Jeffrey D. Stroomer ,  Roger B. Milne ,  Jonathan B. Ballagh ,  Haibing Ma ,  L. James Hwang ,  Nabeel Shirazi

IPC: G06F17/50

CPC classification number: G06F17/5045

Abstract: Method and apparatus for creating a circuit design. An object-oriented program instantiates a plurality of objects that model a circuit design. The objects have hierarchy attributes, connectivity attributes, and display attributes that describe a plurality of modules. The hierarchy attributes define parent-child relationships between modules, the connectivity attributes define input-output connections between modules, and the display attributes define a layout of the modules for viewing. Each of the objects has an associated method for generating a design specification in a selected format. When the program is executed, the design specification is generated from the set of objects. Depending on the capabilities of the available tools, the modules and logic elements are displayed in accordance with the display attributes either from the object-oriented program or from the design specification.

Abstract translation: 用于创建电路设计的方法和装置。 面向对象的程序实例化建模电路设计的多个对象。 对象具有描述多个模块的层次属性，连接属性和显示属性。 层次结构属性定义模块之间的父子关系，连接属性定义模块之间的输入输出连接，显示属性定义模块的布局以供查看。 每个对象具有用于以所选格式生成设计规范的关联方法。 当执行程序时，设计规范是从对象集合生成的。 根据可用工具的功能，根据面向对象程序或设计规范的显示属性显示模块和逻辑元素。

公开(公告)号：US07685554B1

公开(公告)日：2010-03-23

申请号：US11185125

申请日：2005-07-20

Applicant: Sean A. Kelly ,  Roger B. Milne ,  Jeffrey D. Stroomer ,  Sreekanth Juttu

Inventor： Sean A. Kelly ,  Roger B. Milne ,  Jeffrey D. Stroomer ,  Sreekanth Juttu

IPC: G06F17/50

CPC classification number: G06F17/505

Abstract: Determining data rates and data types in a an electronic design. In one embodiment, an electronic design is created in a memory arrangement in response to user input. The electronic design includes a plurality of functional blocks and a plurality of nets connecting the functional blocks. In response to user input, an output data rate and an output data type of data output from at least one of the functional blocks are determined. The input data rate and input data type to each functional block coupled via a net to the at least one functional block are equal to the output data rate and output data type, respectively, from the at least one functional block. For each functional block, an output data rate and output data type are determined as a function of the input data rate and the input data type of the functional block.

Abstract translation: 确定电子设计中的数据速率和数据类型。 在一个实施例中，响应于用户输入在存储器装置中创建电子设计。 电子设计包括多个功能块和连接功能块的多个网。 响应于用户输入，确定从至少一个功能块输出的输出数据速率和输出数据类型的数据。 经由网络耦合到至少一个功能块的每个功能块的输入数据速率和输入数据类型分别等于来自至少一个功能块的输出数据速率和输出数据类型。 对于每个功能块，输出数据速率和输出数据类型根据输入数据速率和功能块的输入数据类型来确定。

公开(公告)号：US07386814B1

公开(公告)日：2008-06-10

申请号：US11054864

申请日：2005-02-10

Applicant: Jeffrey D. Stroomer ,  Roger B. Milne ,  Isaac W. Foraker ,  Sean A. Kelly

Inventor： Jeffrey D. Stroomer ,  Roger B. Milne ,  Isaac W. Foraker ,  Sean A. Kelly

IPC: G06F17/50

CPC classification number: G06F17/5045

Abstract: Translation of high-level design blocks into a design specification in a hardware description language (HDL). Each block in the high-level design is assigned to a group. A set of attributes is identical between the blocks in a group. For each group of blocks, a respective set of parameters having different values on subblocks of at least two blocks in the group is determined. An HDL specification is generated for each group. The HDL specification for a group has for each parameter in the set of parameters, a parameter input.

Abstract translation: 将高级设计块翻译成硬件描述语言（HDL）的设计规范。 高级设计中的每个块都分配给一个组。 一组属性在组中的块之间是相同的。 对于每组块，确定组中至少两个块的子块上具有不同值的相应参数集合。 为每个组生成HDL规范。 组的HDL规范对参数集中的每个参数都有参数输入。

公开(公告)号：US07207015B1

公开(公告)日：2007-04-17

申请号：US10618037

申请日：2003-07-11

Applicant: Jonathan B. Ballagh ,  Roger B. Milne ,  Jeffrey D. Stroomer

Inventor： Jonathan B. Ballagh ,  Roger B. Milne ,  Jeffrey D. Stroomer

IPC: G06F17/50

CPC classification number: G06F17/5045

Abstract: Translation of an electronic design of an integrated circuit into circuit description language is described. In an example, a connection among circuit descriptions representing behavior of circuit elements in the electronic design is identified. The connection is associated with an identifier. The electronic design is then translated into a circuit description language representation, where the connection is implemented within the circuit description language representation using the identifier. In another example, an implicit circuit description representing behavior of circuit elements within the electronic design are identified. Explicit circuit descriptions within the electronic design are augmented with an addition circuit description. The electronic design is then translated into a circuit description language representation.

Abstract translation: 将集成电路的电子设计翻译成电路描述语言。 在一个示例中，识别表示电子设计中电路元件的行为的电路描述之间的连接。 连接与标识符相关联。 然后将电子设计转换成电路描述语言表示，其中使用标识符在电路描述语言表示内实现连接。 在另一示例中，识别表示电子设计内的电路元件的行为的隐式电路描述。 电子设计中的显式电路描述增加了加法电路描述。 然后将电子设计转换为电路描述语言表示。

公开(公告)号：US07085702B1

公开(公告)日：2006-08-01

申请号：US10180857

申请日：2002-06-25

Applicant: L. James Hwang ,  Jeffrey D. Stroomer

Inventor： L. James Hwang ,  Jeffrey D. Stroomer

IPC: G06G17/50 ,  G11C29/54 ,  G06F1/08 ,  G06F1/04 ,  G06F1/06 ,  H03K19/00

CPC classification number: G06F17/5045 ,  G06F17/5022

Abstract: Method and system for modeling and automatically generating an embedded system from a system-level environment. A plurality of user-selectable system-level design objects are provided in the system-level environment. Each system-level design object is defined by a system-level function and is selectable by a system-level designer. A plurality of hardware-level design objects are also provided. Each hardware-level design object is configured to generate a hardware definition of a hardware-level function. Each system-level design object maps to one or more hardware-level design objects. A processor design object is provided which defines a processor. In response to selections made by the designer, a system-level design is instantiated in a system-level design file. The system-level design includes user-selected ones of the system-level and processor design objects. The system simulates behavior of the system-level design consistent with the processor, system-level functions, and behavior of a hardware definition from the hardware-level design objects that implement the user-selected ones of the system-level design objects.

Abstract translation: 用于从系统级环境建模和自动生成嵌入式系统的方法和系统。 在系统级环境中提供多个用户可选择的系统级设计对象。 每个系统级设计对象由系统级功能定义，可由系统级设计者选择。 还提供了多个硬件级设计对象。 每个硬件级设计对象被配置为生成硬件级功能的硬件定义。 每个系统级设计对象映射到一个或多个硬件级设计对象。 提供了一种定义处理器的处理器设计对象。 响应于设计人员的选择，系统级设计在系统级设计文件中实例化。 系统级设计包括用户选择的系统级和处理器设计对象。 系统模拟系统级设计的行为，与执行系统级设计对象中用户选择的硬件级别设计对象的处理器，系统级功能和硬件定义的行为一致。

公开(公告)号：US07007261B1

公开(公告)日：2006-02-28

申请号：US10388711

申请日：2003-03-14

Applicant: Jonathan B. Ballagh ,  Roger B. Milne ,  Jeffrey D. Stroomer

Inventor： Jonathan B. Ballagh ,  Roger B. Milne ,  Jeffrey D. Stroomer

IPC: G06F17/50

CPC classification number: G06F17/505

Abstract: Method, apparatus, and computer readable medium for translating an electronic design of an integrated circuit into circuit description language is described. The electronic design includes a plurality of circuit descriptions representing behavior of circuit elements. A circuit description template is associated with a circuit description of the plurality of circuit descriptions. The circuit description template includes a first portion for fixed attributes of the circuit description and a second portion for variable attributes of the circuit description. One or more text processors are associated with the circuit description template. Variable attributes of the circuit description are related to the second portion of the circuit description template to produce a data structure. The circuit description template is processed using the one or more text processors with the data structure as parametric input.

Abstract translation: 描述了用于将集成电路的电子设计转换为电路描述语言的方法，装置和计算机可读介质。 电子设计包括表示电路元件的行为的多个电路描述。 电路描述模板与多个电路描述的电路描述相关联。 电路描述模板包括用于电路描述的固定属性的第一部分和用于电路描述的可变属性的第二部分。 一个或多个文本处理器与电路描述模板相关联。 电路描述的可变属性与电路描述模板的第二部分相关，以产生数据结构。 使用具有数据结构作为参数输入的一个或多个文本处理器来处理电路描述模板。

公开(公告)号：US08356266B1

公开(公告)日：2013-01-15

申请号：US12757945

申请日：2010-04-09

Applicant: Jingzhao Ou ,  Chi Bun Chan ,  Jeffrey D. Stroomer

Inventor： Jingzhao Ou ,  Chi Bun Chan ,  Jeffrey D. Stroomer

IPC: G06F17/50

CPC classification number: G06F17/5072

Abstract: An embodiment of a method for enabling a high level modeling system for implementing a circuit design in an integrated circuit device includes: receiving a high-level characterization of the circuit design; receiving a portable location constraint associated with elements of the circuit design; and generating, by a computer, a low-level characterization of the circuit design based upon the high-level characterization and the portable location constraint.

Abstract translation: 一种实现用于实现集成电路设备中的电路设计的高级建模系统的方法包括：接收电路设计的高级特征; 接收与所述电路设计的元件相关联的便携式位置约束; 以及由计算机基于高级特征和便携式位置限制来生成电路设计的低级特征。