Polymerization of macrocyclic polyester oligomers using N-heterocyclic carbene catalysts
    2.
    发明申请
    Polymerization of macrocyclic polyester oligomers using N-heterocyclic carbene catalysts 审中-公开
    使用N-杂环卡宾催化剂聚合大环聚酯低聚物

    公开(公告)号:US20060098768A1

    公开(公告)日:2006-05-11

    申请号:US11270092

    申请日:2005-11-09

    IPC分类号: H03D1/04

    摘要: A method, system, and a computer usable program code for reducing the effects of intersymbol interference in a high speed data transmission using various steps. First, a training sequence is established between a transmitter operably connected by a conductor to a receiver. Data is analyzed at the receiver. Transition bits following a stable data stream are skewed by the transmitter. When data is received at the receiver, the variable transition time for the transition bits is adjusted by the transmitter to optimize timing and reduce timing effects of intersymbol interference.

    摘要翻译: 一种用于使用各种步骤在高速数据传输中减少码间干扰的影响的方法,系统和计算机可用程序代码。 首先,在由导体可操作地连接到接收器的发射器之间建立训练序列。 接收机分析数据。 稳定数据流之后的转换位由发送器偏移。 当在接收机处接收到数据时,转换位的可变转换时间由发送器调整以优化定时并减少符号间干扰的定时效应。

    System and method for amplitude optimization in high-speed serial transmissions
    3.
    发明申请
    System and method for amplitude optimization in high-speed serial transmissions 审中-公开
    高速串行传输幅度优化的系统和方法

    公开(公告)号:US20070121496A1

    公开(公告)日:2007-05-31

    申请号:US11290786

    申请日:2005-11-30

    IPC分类号: H04L12/26 H04B1/44

    CPC分类号: H04W52/36 H04W52/04 H04W52/48

    摘要: A method, system, and computer usable program code for increasing drive strength using various steps. First, a data signal is received at a receiving device. The receiving device determines whether the data is successfully received once the data signal is received at the receiving device. If the receiving device determines that the data signal is unsuccessfully received, the receiving device requests an increase in a signal amplitude of the data signal transmitted by a transmitting device that sent the data signal for increasing the drive strength.

    摘要翻译: 使用各种步骤提高驱动强度的方法,系统和计算机可用程序代码。 首先,在接收装置处接收数据信号。 一旦在接收设备处接收到数据信号,接收设备就确定数据是否成功接收。 如果接收设备确定数据信号未被成功接收,则接收设备请求增加由发送数据信号的发送设备发送的数据信号的信号幅度,以提高驱动强度。

    Simultaneous display of eye diagram and jitter profile during device characterization
    4.
    发明授权
    Simultaneous display of eye diagram and jitter profile during device characterization 失效
    在设备表征期间同时显示眼图和抖动曲线

    公开(公告)号:US07555039B2

    公开(公告)日:2009-06-30

    申请号:US11323935

    申请日:2005-12-29

    申请人: Gabriel Romero

    发明人: Gabriel Romero

    IPC分类号: H04Q1/20 G01R13/00

    CPC分类号: G01R31/31709 G01R13/0236

    摘要: A system, apparatus and method for testing and optimizing an electrical device using a simultaneous display of both a signal's eye diagram and total jitter profile are described. In one embodiment of the invention, a data capture module capable of obtaining and separating the total jitter present in a signal into deterministic and random jitter, as well as other eye diagram information, is coupled to the electrical device and one or more display devices. These one or more display devices provide a user a simultaneous visual display of both random jitter and an eye diagram. This simultaneous display allows a user to test and optimize the electrical device without having to attach and detach the electrical device to multiple measuring devices.

    摘要翻译: 描述了使用同时显示信号眼图和总抖动曲线来测试和优化电子设备的系统,装置和方法。 在本发明的一个实施例中,能够将存在于信号中的总抖动确定为和随机抖动以及其他眼图信息的数据捕获模块耦合到电气设备和一个或多个显示设备。 这些一个或多个显示设备为用户提供了随机抖动和眼图的同时可视显示。 这种同时显示允许用户测试和优化电气设备,而不必将电气设备连接和分离到多个测量设备。

    Methods and structure for SAS domain transceiver optimization
    5.
    发明申请
    Methods and structure for SAS domain transceiver optimization 有权
    SAS域收发器优化的方法和结构

    公开(公告)号:US20070087615A1

    公开(公告)日:2007-04-19

    申请号:US11251393

    申请日:2005-10-14

    IPC分类号: H01R13/64

    CPC分类号: H04L43/50

    摘要: Methods and structures within a SAS domain for automated tuning performance of a coupled pair of transceivers. In one aspect hereof, control registers of a transmitting transceiver coupled to a receiving transceiver are adjusted to a plurality of distinct combinations of settings. For each distinct setting, a test pattern may be transmitted from the transmitting transceiver to the receiving transceiver. Status registers of the transmitting transceiver and of the receiving transceiver may be read to identify errors in the transmission. Identified errors are counted for each for distinct setting of the control registers to determine a preferred setting to best tune operation of the transceiver pair. The testing may be performed by any SAS initiator device or SAS expander acting as an initiator and may be performed on any coupled pair of transceiver in the SAS domain.

    摘要翻译: SAS域内的方法和结构,用于自动调整耦合的一对收发器的性能。 在一个方面,耦合到接收收发器的发送收发器的控制寄存器被调整到多个不同的设置组合。 对于每个不同的设置,测试模式可以从发送收发器发送到接收收发器。 可以读取发送收发器和接收收发器的状态寄存器,以识别发送中的错误。 为每个控制寄存器的不同设置计算识别的错误,以确定最佳调谐收发器对的操作的优选设置。 可以由作为发起者的任何SAS启动器设备或SAS扩展器执行测试,并且可以在SAS域中的任何耦合的收发器对上执行该测试。

    Methods and structure for IC temperature self-monitoring
    6.
    发明授权
    Methods and structure for IC temperature self-monitoring 失效
    IC温度自我监测的方法和结构

    公开(公告)号:US06959258B2

    公开(公告)日:2005-10-25

    申请号:US10368520

    申请日:2003-02-18

    IPC分类号: G06F1/20 G06F15/00 H01L23/34

    摘要: Methods and systems are provided for thermal self-monitoring of integrated circuits. Temperature is sensed, digitized, encoded, and compared to one or more threshold values by circuits added within an integrated circuit. A signal produced by a thermal diode within an integrated circuit is applied to an analog to digital converter and may be compared to one or more threshold values to produce a digital over temperature condition signal. An appropriate cooling action may be initiated by processing of the digital signal so produced. Also provided are methods and systems to alter the range and resolution of the temperature threshold comparisons.

    摘要翻译: 为集成电路的热自我监测提供了方法和系统。 感测,数字化,编码温度,并通过在集成电路内添加的电路与一个或多个阈值进行比较。 由集成电路内的热二极管产生的信号被施加到模数转换器,并且可以与一个或多个阈值进行比较以产生数字过温条件信号。 可以通过处理如此产生的数字信号来启动适当的冷却动作。 还提供了改变温度阈值比较的范围和分辨率的方法和系统。

    Low-impact analyzer interface
    7.
    发明申请

    公开(公告)号:US20050114576A1

    公开(公告)日:2005-05-26

    申请号:US10705638

    申请日:2003-11-10

    CPC分类号: G06F11/221 G06F2213/0036

    摘要: Disclosed is a method and apparatus for providing a universal SCSI bus interface in which bus performance is not degraded, and the analyzer is not negatively influenced by post processing while maintaining the ability to filter and store data using any of a number of generic logic analyzers. The SCSI bus interface does not rely on a specific clock speed and maintains the ability to view both raw data and protocol errors. The universal SCSI bus interface embodiments described herein produce stable clock signals for use by an analyzer in a form that is phase and frequency stabilized with the SCSI bus clock. This allows data sampling to mimic the performance characteristics of a device attached to the SCSI bus thereby minimizing sampling error.

    Simultaneous display of eye diagram and jitter profile during device characterization
    8.
    发明申请
    Simultaneous display of eye diagram and jitter profile during device characterization 失效
    在设备表征期间同时显示眼图和抖动曲线

    公开(公告)号:US20070156360A1

    公开(公告)日:2007-07-05

    申请号:US11323935

    申请日:2005-12-29

    申请人: Gabriel Romero

    发明人: Gabriel Romero

    IPC分类号: G06F19/00

    CPC分类号: G01R31/31709 G01R13/0236

    摘要: A system, apparatus and method for testing and optimizing an electrical device using a simultaneous display of both a signal's eye diagram and total jitter profile are described. In one embodiment of the invention, a data capture module capable of obtaining and separating the total jitter present in a signal into deterministic and random jitter, as well as other eye diagram information, is coupled to the electrical device and one or more display devices. These one or more display devices provide a user a simultaneous visual display of both random jitter and an eye diagram. This simultaneous display allows a user to test and optimize the electrical device without having to attach and detach the electrical device to multiple measuring devices.

    摘要翻译: 描述了使用同时显示信号眼图和总抖动曲线来测试和优化电子设备的系统,装置和方法。 在本发明的一个实施例中,能够将存在于信号中的总抖动确定为和随机抖动以及其他眼图信息的数据捕获模块耦合到电气设备和一个或多个显示设备。 这些一个或多个显示设备为用户提供了随机抖动和眼图的同时可视显示。 这种同时显示允许用户测试和优化电气设备,而不必将电气设备连接和分离到多个测量设备。

    Self verifying communications testing
    9.
    发明申请
    Self verifying communications testing 有权
    自我验证通信测试

    公开(公告)号:US20060075318A1

    公开(公告)日:2006-04-06

    申请号:US10959619

    申请日:2004-10-06

    IPC分类号: G01R31/28

    摘要: A system and method for testing a device with multiple interfaces by generating a predetermined data pattern within the device, transmitting the pattern to a test analyzer, generating a second predetermined data pattern within the test analyzer, and simultaneously transmitting the second test pattern to the device where the second test pattern is verified. The first and second test patterns may be the same or different, depending on the application. Further, the transmit and receive paths may be tested separately and independently in addition to simultaneously.

    摘要翻译: 一种用于通过在所述设备内生成预定数据模式来测试具有多个接口的设备的系统和方法,将所述模式发送到测试分析器,在所述测试分析器内生成第二预定数据模式,并同时将所述第二测试模式发送到所述设备 其中第二个测试模式被验证。 第一和第二测试图案可以相同或不同,这取决于应用。 此外,发送和接收路径可以单独地和独立地进行测试,同时。

    Methodology for performing register read/writes to two or more expanders with a common test port
    10.
    发明申请
    Methodology for performing register read/writes to two or more expanders with a common test port 失效
    用于使用通用测试端口对两个或多个扩展器进行寄存器读/写操作的方法

    公开(公告)号:US20050108602A1

    公开(公告)日:2005-05-19

    申请号:US10718286

    申请日:2003-11-19

    摘要: Disclosed is a process for controlling the expander cores of a dual expander using a single test port, such as a J-tag port. Access to and control of each expander core is accomplished by placing one of the cores in a bypass mode and accessing and controlling the other core through data supplied serially through the J-tag port.

    摘要翻译: 公开了使用单个测试端口(例如J-标签端口)来控制双扩展器的扩展器核心的过程。 通过将核心中的一个放置在旁路模式中,并通过通过J-标签端口串行提供的数据来访问和控制另一个内核来实现对每个扩展器内核的访问和控制。