Enabling multiple instruction stream/multiple data stream extensions on microprocessors
    3.
    发明授权
    Enabling multiple instruction stream/multiple data stream extensions on microprocessors 有权
    在微处理器上启用多个指令流/多个数据流扩展

    公开(公告)号:US07768518B2

    公开(公告)日:2010-08-03

    申请号:US11528121

    申请日:2006-09-27

    IPC分类号: G06F15/80

    CPC分类号: G06F9/455 G06F9/461

    摘要: Embodiments described herein disclose a system for enabling emulation of a MIMD ISA extension which supports user-level sequencer management and control, and a set of privileged code executed by both operating system managed sequencers and application managed sequencers, including different sets of persistent per-CPU and per-thread data. In one embodiment, a lightweight code layer executes beneath the operating system. This code layer is invoked in response to particular monitored events, such as the need for communication between an operating system managed sequencer and an application managed sequencer. Control is transferred to this code layer, for execution of special operations, after which control returns back to originally executing code. The code layer is normally dormant and can be invoked at any time when either a user application or the operating system is executing.

    摘要翻译: 本文描述的实施例公开了一种用于启用支持用户级定序器管理和控制的MIMD ISA扩展的仿真的系统,以及由操作系统管理的顺控程序和应用程序管理的定序器执行的一组特权代码,包括不同的持续性每个CPU 和每线程数据。 在一个实施例中,在操作系统之下执行轻量级代码层。 响应于特定的监视事件,例如对操作系统管理的定序器和应用程序管理的定序器之间的通信的需要,该代码层被调用。 控制被传送到该代码层,用于执行特殊操作,之后控制返回到原始执行的代码。 代码层通常处于休眠状态,可以在用户应用程序或操作系统正在执行时随时调用。

    Enabling multiple instruction stream/multiple data stream extensions on microprocessors
    4.
    发明申请
    Enabling multiple instruction stream/multiple data stream extensions on microprocessors 有权
    在微处理器上启用多个指令流/多个数据流扩展

    公开(公告)号:US20080077909A1

    公开(公告)日:2008-03-27

    申请号:US11528121

    申请日:2006-09-27

    IPC分类号: G06F9/44

    CPC分类号: G06F9/455 G06F9/461

    摘要: Embodiments described herein disclose a system for enabling emulation of a MIMD ISA extension which supports user-level sequencer management and control, and a set of privileged code executed by both operating system managed sequencers and application managed sequencers, including different sets of persistent per-CPU and per-thread data. In one embodiment, a lightweight code layer executes beneath the operating system. This code layer is invoked in response to particular monitored events, such as the need for communication between an operating system managed sequencer and an application managed sequencer. Control is transferred to this code layer, for execution of special operations, after which control returns back to originally executing code. The code layer is normally dormant and can be invoked at any time when either a user application or the operating system is executing.

    摘要翻译: 本文描述的实施例公开了一种用于启用支持用户级定序器管理和控制的MIMD ISA扩展的仿真的系统,以及由操作系统管理的顺控程序和应用程序管理的定序器执行的一组特权代码,包括不同的持续性每个CPU 和每线程数据。 在一个实施例中,在操作系统之下执行轻量级代码层。 响应于特定的监视事件,例如对操作系统管理的定序器和应用程序管理的定序器之间的通信的需要,该代码层被调用。 控制被传送到该代码层,用于执行特殊操作,之后控制返回到原始执行的代码。 代码层通常处于休眠状态,可以在用户应用程序或操作系统正在执行时随时调用。