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1.发明授权Method and apparatus for servicing simultaneous I/O trap and debug traps in a microprocessor 失效用于维护微处理器中同步I / O陷阱和调试陷阱的方法和装置
公开(公告)号：US5745770A
公开(公告)日：1998-04-28
申请号：US595187
申请日：1996-02-01
CPC分类号： G06F9/4812 , G06F11/3648 , Y02B60/144
摘要： A microprocessor includes the capability to service at least one debug exception and an I/O trap generated during execution of a single instruction. After executing each instruction, the microprocessor determines whether a debug exception and an I/O trap occurred. If at least one debug exception and an I/O trap exist, then the microprocessor determines an active status for the debug exception. The microprocessor stores the contents of internal registers, constituting a state of the microprocessor, to memory, and latches a breakpoint status for the debug exception in a public debug status register. The breakpoint status is preserved by copying the breakpoint status to a private debug status register. The microprocessor services the I/O trap by executing a SMM handler, an upon returning from the SMM handler, the state of the microprocessor is restored. If the I/O trap serviced requires instruction restart, then the state of the microprocessor is adjusted to re-execute the instruction. The microprocessor copies the breakpoint status, stored in the private debug status register, to the public debug status register when the I/O trap does not require instruction restart. The debug exception is subsequently serviced by executing an INT1 handler.
摘要翻译： 微处理器包括服务于在单个指令执行期间产生的至少一个调试异常和I / O陷阱的能力。 执行每条指令后，微处理器确定是否发生调试异常和I / O陷阱。 如果存在至少一个调试异常和I / O陷阱，则微处理器确定调试异常的活动状态。 微处理器将构成微处理器状态的内部寄存器的内容存储到存储器中，并在公共调试状态寄存器中锁存调试异常的断点状态。 通过将断点状态复制到专用调试状态寄存器来保留断点状态。 微处理器通过执行SMM处理程序来服务I / O陷阱，当从SMM处理程序返回时，微处理器的状态被恢复。 如果I / O陷阱需要指令重新启动，则调整微处理器的状态以重新执行指令。 当I / O陷阱不需要重新启动指令时，微处理器将存储在专用调试状态寄存器中的断点状态复制到公共调试状态寄存器。 调试异常随后通过执行INT1处理程序进行服务。
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公开(公告)号：US08409044B2
公开(公告)日：2013-04-02
申请号：US12256875
申请日：2008-10-23
申请人： Gregory J Hilker , Kevin R Beutler , Robert B Dwyer , Chih-Hung Chung , David R Brandt , William G Hunt , Gregory E Woodside
发明人： Gregory J Hilker , Kevin R Beutler , Robert B Dwyer , Chih-Hung Chung , David R Brandt , William G Hunt , Gregory E Woodside
IPC分类号： F16H57/04
CPC分类号： F16H48/38 , F16H57/0424 , F16H57/0471 , F16H57/0483 , F16H2048/423
摘要： A method for lubricating an axle assembly can include: coupling a pair of tapered roller bearing to opposite ends of a differential housing; placing the differential housing into a carrier housing assembly such that the tapered roller bearings support the differential housing on the carrier housing assembly for rotation about a first axis; collecting a lubricant proximate a side of one of the tapered roller bearings opposite the differential housing; and rotating the differential housing about the first axis to cause the one of the tapered roller bearings to move a portion of the collected lubricant through the differential housing. A related axle assembly is also provided.
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3.发明授权
公开(公告)号：US5884088A
公开(公告)日：1999-03-16
申请号：US893443
申请日：1997-07-10
申请人： James P. Kardach , Chih-Hung Chung , Jason Ziller
发明人： James P. Kardach , Chih-Hung Chung , Jason Ziller
IPC分类号： G06F1/32
CPC分类号： G06F1/3215 , G06F1/3237 , G06F1/3275 , Y02B60/1221 , Y02B60/1228
摘要： A computer system is provided for monitoring the activity of a bus controller of a processor and responsive thereto for controlling the power consumption of a target controller such as a memory controller coupled to the bus controller. The computer system includes a bus, a processor having a bus controller coupled to the bus, and a bus activity monitor, coupled to the bus controller, generating a bus activity signal indicative of activity in the bus controller. The computer system also includes a target controller, coupled to the bus controller, for controlling the exchange of information between the processor and a target circuit. The target controller has an input for receiving a sequencing signal. The computer system additionally includes a power management circuit for controlling a power consumption of the target controller. The power management circuit has an input for receiving the bus activity signal and, an output for generating the sequencing signal in response to the bus activity signal.
摘要翻译： 提供了一种用于监视处理器的总线控制器的活动并响应于此来控制诸如连接到总线控制器的存储器控制器的目标控制器的功耗的计算机系统。 计算机系统包括总线，具有耦合到总线的总线控制器的处理器和耦合到总线控制器的总线活动监视器，生成指示总线控制器中的活动的总线活动信号。 计算机系统还包括耦合到总线控制器的目标控制器，用于控制处理器与目标电路之间的信息交换。 目标控制器具有用于接收排序信号的输入。 计算机系统还包括用于控制目标控制器的功耗的电源管理电路。 功率管理电路具有用于接收总线活动信号的输入端和用于响应于总线活动信号产生排序信号的输出。
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4.发明授权公开(公告)号：US09156110B2
公开(公告)日：2015-10-13
申请号：US13176794
申请日：2011-07-06
CPC分类号： B23K31/003 , B23K2101/006 , B60K17/165 , F16H2055/173 , Y10T403/477
摘要： A weldment in which a first component defines a bore, a second component is received in the bore and a weld is employed to couple the second component to the first component. The first component has an isolation pocket formed about the bore such that an annular projection having an annular collar portion is formed. The isolation pocket is sized and positioned relative to the weld such that the annular collar portion is deflected about the base into a position that is radially inwardly from a position of the annular collar portion prior to the formation of the weld such that the isolation pocket controls axial shrinkage associated with the formation and cooling of the weld.
摘要翻译： 焊件，其中第一部件限定孔，第二部件被容纳在孔中，并且使用焊接来将第二部件连接到第一部件。 第一部件具有围绕孔形成的隔离袋，从而形成具有环形套环部分的环形突起。 隔离袋相对于焊缝的尺寸和定位尺寸使得环形套环部分围绕基座偏转到在形成焊缝之前从环形套环部分的位置处径向向内的位置，使得隔离袋控制 与焊缝的形成和冷却有关的轴向收缩。
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5.发明授权Method and apparatus for maintaining cache coherency in an integrated circuit operating in a low power state 失效用于在低功率状态下工作的集成电路中保持高速缓存一致性的方法和装置
公开(公告)号：US6014751A
公开(公告)日：2000-01-11
申请号：US841858
申请日：1997-05-05
申请人： James P. Kardach , John Horigan , Ravi Eakambaram , Tosaku Nakanishi , Chih-Hung Chung , Borys S. Senyk
发明人： James P. Kardach , John Horigan , Ravi Eakambaram , Tosaku Nakanishi , Chih-Hung Chung , Borys S. Senyk
CPC分类号： G06F1/3237 , G06F1/3203 , G06F1/324 , G06F12/0835 , Y02B60/1217 , Y02B60/1221
摘要： A method and apparatus for operating an integrated in a reduced-power consumption state are described. The apparatus comprises power-reduction logic which, to place the integrated circuit in the reduced-power consumption state, gates a clock signal to both first and second sets of functional units within the integrated circuit. The first set of functional units is distinguished in that it is required to perform cache coherency operations within integrated circuit. The apparatus includes an input which is coupled to receive a signal indicating a memory access, to a memory resource accessible by the integrated circuit, by a further device external to the integrated circuit. In response to the assertion of this signal, the power-reduction logic propagates the clock signal to the first set of functional units, to enable this set of functional units to perform a cache coherency operation which may be necessitated by the memory access by the external device.
摘要翻译： 描述用于操作集成在降低功耗状态的方法和装置。 该装置包括功率降低逻辑，为了将集成电路置于降低功耗状态，将集成电路中的第一组和第二组功能单元的时钟信号置于门限。 第一组功能单元的特征在于需要在集成电路内执行高速缓存一致性操作。 该装置包括输入，该输入被耦合以通过集成电路外部的另外的设备将指示存储器访问的信号接收到由集成电路可访问的存储器资源。 响应于该信号的断言，功率降低逻辑将时钟信号传播到第一组功能单元，以使得该组功能单元能够执行高速缓存一致性操作，这可能由外部存储器访问所必需 设备。
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公开(公告)号：US20100105513A1
公开(公告)日：2010-04-29
申请号：US12256875
申请日：2008-10-23
申请人： Gregory J. Hilker , Kevin R. Beutler , Robert B. Dwyer , Chih-Hung Chung , David R. Brandt , William G. Hunt , Gregory E. Woodside
发明人： Gregory J. Hilker , Kevin R. Beutler , Robert B. Dwyer , Chih-Hung Chung , David R. Brandt , William G. Hunt , Gregory E. Woodside
IPC分类号： F16H57/04
CPC分类号： F16H48/38 , F16H57/0424 , F16H57/0471 , F16H57/0483 , F16H2048/423
摘要： A method for lubricating an axle assembly can include: coupling a pair of tapered roller bearing to opposite ends of a differential housing; placing the differential housing into a carrier housing assembly such that the tapered roller bearings support the differential housing on the carrier housing assembly for rotation about a first axis; collecting a lubricant proximate a side of one of the tapered roller bearings opposite the differential housing; and rotating the differential housing about the first axis to cause the one of the tapered roller bearings to move a portion of the collected lubricant through the differential housing. A related axle assembly is also provided.
摘要翻译： 用于润滑轴组件的方法可以包括：将一对圆锥滚子轴承联接到差速器壳体的相对端; 将所述差速器壳体放置在载体壳体组件中，使得所述圆锥滚子轴承将所述载体壳体组件上的所述差速器壳体支撑成围绕第一轴线旋转; 在与差速器壳体相对的一个锥形滚柱轴承的一侧附近收集润滑剂; 并且使所述差速器壳体围绕所述第一轴线旋转，以使所述圆锥滚子轴承中的所述一个将所述收集的润滑剂的一部分移动通过所述差速器壳体。 还提供了相关的轴组件。
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公开(公告)号：US20090204247A1
公开(公告)日：2009-08-13
申请号：US12362988
申请日：2009-01-30
申请人： David P. Schankin , Suhui W. Wang , Chih-Hung Chung , Zhaohui Sun
发明人： David P. Schankin , Suhui W. Wang , Chih-Hung Chung , Zhaohui Sun
CPC分类号： F16C35/067 , F16H57/021 , F16H57/037 , Y10S345/952 , Y10S345/954
摘要： A method for customizing a bearing bore in a housing so that the bearing assembly will transmit load in a desired manner over a predetermined range of operating temperatures.
摘要翻译： 一种用于定制壳体中的轴承孔的方法，使得轴承组件将在预定的操作温度范围内以期望的方式传递负载。
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8.发明授权Apparatus and method for reducing power consumption due to cache and TLB accesses in a processor front-end 有权用于在处理器前端降低由高速缓存和TLB访问引起的功耗的装置和方法公开(公告)号：US06678815B1
公开(公告)日：2004-01-13
申请号：US09604855
申请日：2000-06-27
IPC分类号： G06F1200
CPC分类号： G06F12/1027 , G06F12/0882 , G06F2212/1028 , G06F2212/652 , G06F2212/655 , Y02D10/13
摘要： An apparatus and method for reducing power consumption in a processor front end are provided. The processor includes an instruction cache, a TLB, and a branch predictor. For sequential code execution, the instruction cache is disabled unless the next instruction fetch will cross a cache line boundary, thus reducing unnecessary accesses to the instruction cache. The TLB is disabled unless the next instruction fetch will cross a page boundary, thus reducing unnecessary TLB look-ups. For code branching, the branch predictor is configured to include, for each target address, an indication of whether the target address is in the same page as the corresponding branch address. When a branch occurs so as to cause access to a given entry in the branch predictor, the TLB is disabled if the target address is in the same page as the branch address.
摘要翻译： 提供了用于降低处理器前端中的功耗的装置和方法。 处理器包括指令高速缓存，TLB和分支预测器。 对于顺序代码执行，指令高速缓存被禁用，除非下一个指令提取将跨越高速缓存行边界，从而减少对指令高速缓存的不必要的访问。 除非下一条指令获取将跨越页面边界，否则TLB被禁用，从而减少不必要的TLB查找。 对于代码分支，分支预测器被配置为针对每个目标地址包括目标地址是否在与相应分支地址相同的页面中的指示。 当发生分支以便访问分支预测器中的给定条目时，如果目标地址与分支地址在同一页面中，则TLB被禁用。
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公开(公告)号：US06301174B1
公开(公告)日：2001-10-09
申请号：US09470679
申请日：1999-12-23
申请人： Chih-Hung Chung
发明人： Chih-Hung Chung
IPC分类号： G11C700
摘要： In accordance with an embodiment of the invention, unused data bits are set to a preferred value, either zero or one, depending on the circuit used to read the data. With the unused data bits set to the preferred value the precharge is not discharged during the data read operation. Not discharging the precharge allows power to be saved in the subsequent precharge and read operation.
摘要翻译： 根据本发明的实施例，根据用于读取数据的电路，未使用的数据位被设置为优选值，零或一个。 在未使用的数据位设置为优选值时，在数据读取操作期间预放电不会被释放。 不放电预充电允许在随后的预充电和读取操作中节省电力。
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10.发明申请公开(公告)号：US20130011182A1
公开(公告)日：2013-01-10
申请号：US13176794
申请日：2011-07-06
IPC分类号： F16B11/00
CPC分类号： B23K31/003 , B23K2101/006 , B60K17/165 , F16H2055/173 , Y10T403/477
摘要： A weldment in which a first component defines a bore, a second component is received in the bore and a weld is employed to couple the second component to the first component. The first component has an isolation pocket formed about the bore such that an annular projection having an annular collar portion is formed. The isolation pocket is sized and positioned relative to the weld such that the annular collar portion is deflected about the base into a position that is radially inwardly from a position of the annular collar portion prior to the formation of the weld such that the isolation pocket controls axial shrinkage associated with the formation and cooling of the weld.
摘要翻译： 焊件，其中第一部件限定孔，第二部件被容纳在孔中，并且使用焊接来将第二部件连接到第一部件。 第一部件具有围绕孔形成的隔离袋，从而形成具有环形套环部分的环形突起。 隔离袋相对于焊缝的尺寸和定位尺寸使得环形套环部分围绕基座偏转到在形成焊缝之前从环形套环部分的位置处径向向内的位置，使得隔离袋控制 与焊缝的形成和冷却有关的轴向收缩。
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