公开(公告)号：US4743960A

公开(公告)日：1988-05-10

申请号：US870128

申请日：1986-06-03

申请人： Gerard Duvic ,  Michel Veillard ,  Laurent Paris ,  Patrice Senn

发明人： Gerard Duvic ,  Michel Veillard ,  Laurent Paris ,  Patrice Senn

IPC分类号： H04N9/67 ,  H04N9/64 ,  H04N9/77 ,  H04N9/78 ,  H04N11/04

CPC分类号： H04N9/64 ,  H04N9/77 ,  H04N9/78

摘要： Circuit for producing analog primary signals of a television signal from its digital luminance and chrominance components comprising in series an interpolating digital filter, a digital dematrixer and three digital - analog converters.The interpolating digital filter carried out an oversampling of the luminance signal Y in a ratio of 2 and an oversampling of each chrominance signal CR, CB in a sampling ratio such that the sampling frequency of the luminance and chrominance digital signals has the same sampling frequency. The digital dematrixer produces the primary digital color signals from the oversampled luminance and chrominance components.

摘要翻译： 用于从其数字亮度和色度分量产生电视信号的模拟主信号的电路，包括内插数字滤波器，数字dematrixer和三个数模转换器。 内插数字滤波器以比例2对亮度信号Y进行过采样，并以采样比使每个色度信号CR，CB过采样，使得亮度和色度数字信号的采样频率具有相同的采样频率。 数字dematrixer从过采样的亮度和色度分量产生主要的数字彩色信号。

公开(公告)号：US06784518B1

公开(公告)日：2004-08-31

申请号：US09553916

申请日：2000-04-20

申请人： Gérard Merckel ,  Michel Pons ,  Patrice Senn ,  Jean Michel Fournier

发明人： Gérard Merckel ,  Michel Pons ,  Patrice Senn ,  Jean Michel Fournier

IPC分类号： H01L2900

CPC分类号： H01L27/0688

摘要： The integrated circuit comprises an inductor made at a metallization level of the circuit and a buried layer situated in the substrate of the integrated circuit under the said inductor, and connection means linking the inductor to the buried layer. The connection means are configured in such a way as to ensure the same potential in terms of dynamic response between the inductor and the buried layer. This equipotential is ensured by a transistor in a follower type arrangement made in the substrate and connected in parallel with the stray capacitances under the inductor.

摘要翻译： 集成电路包括在电路的金属化级别制造的电感器和位于所述电感器下的集成电路的衬底中的掩埋层以及将电感器连接到掩埋层的连接装置。 连接装置被配置成确保在电感器和掩埋层之间的动态响应方面具有相同的电位。 这种等电位由在衬底中制造的随动型布置的晶体管确保，并且与电感下的杂散电容并联连接。

公开(公告)号：US5262720A

公开(公告)日：1993-11-16

申请号：US774521

申请日：1991-10-08

申请人： Patrice Senn ,  Alan Lelah ,  Gilbert Martel ,  Denis Pradel

发明人： Patrice Senn ,  Alan Lelah ,  Gilbert Martel ,  Denis Pradel

IPC分类号： G01R31/00 ,  G09G3/20 ,  G09G3/36 ,  G01R15/12

CPC分类号： G09G3/3688 ,  G09G2330/12 ,  G09G3/2011

摘要： A circuit for controlling the lines of a display screen and including a t means with a single output is disclosed. The test means includes a single test control line (LCT), a single test output line (LST) and a plurality of sample holders (CEBj) and associated gates (Pj) and switches (Ij). The output voltage of the sample holders is transmitted onto a test output block (ST).

摘要翻译： 公开了一种用于控制显示屏幕的线并包括具有单个输出的测试装置的电路。 测试装置包括单个测试控制线（LCT），单个测试输出线（LST）和多个样本保持器（CEBj）和相关联的门（Pj）和开关（Ij）。 样本保持器的输出电压被传送到测试输出块（ST）。

公开(公告)号：US4908579A

公开(公告)日：1990-03-13

申请号：US235495

申请日：1988-08-24

申请人： Mohamed S. Tawfik ,  Patrice Senn

发明人： Mohamed S. Tawfik ,  Patrice Senn

IPC分类号： H03H19/00

CPC分类号： H03H19/004

摘要： This filter circuit comprises at least one basic cell (2) arranged as a switched capacitor sampling filter, together with a clock suitable for defining two different states for controlling sampling. According to the main characteristic of the invention, the circuit includes upstream switching means (4) suitable for inverting the polarity of the signal input to the cell during one of the two states, and downstream switching means (6) suitable for inverting the output signal from the cell (2). This makes it possible to transpose the filtering frequency band of the cell (2). The circuit is applicable to manufacturing switched capacitor sampling filters in the form of integrated circuits.

摘要翻译： 该滤波器电路包括布置为开关电容器采样滤波器的至少一个基本单元（2），以及适于定义用于控制采样的两个不同状态的时钟。 根据本发明的主要特征，电路包括适于在两种状态之一时反转输入到单元的信号的极性的上游开关装置（4），以及适于反相输出信号的下游开关装置（6） 从细胞（2）。 这使得可以转置单元（2）的滤波频带。 该电路适用于以集成电路的形式制造开关电容器采样滤波器。

公开(公告)号：US4304000A

公开(公告)日：1981-12-01

申请号：US41041

申请日：1979-05-21

申请人： Georges Bonnerot ,  Patrice Senn ,  Michel Coudreuse

发明人： Georges Bonnerot ,  Patrice Senn ,  Michel Coudreuse

IPC分类号： H04J1/00 ,  H04J1/05 ,  H04J1/16 ,  H04J3/00 ,  H04J4/00

CPC分类号： H04J1/05 ,  H04J1/16 ,  H04J4/005

摘要： To supervise the operation of an arithmetic unit of a digital transmultiplexer intended to convert a TDM-signal into a FDM-signal and vice versa, a pilot signal is utilized as the test signal which pilot signal is also used to control the level of the received FDM-signals and is processed in the transmultiplexer. The pilot signal selection filter used for controlling the level is used, also in time-division multiplex, for selecting a component having a frequency equal to the pilot signal frequency and occurring in each of the two input and output signals of the arithmetic unit.

摘要翻译： 为了监督旨在将TDM信号转换为FDM信号的数字多路转换器的运算单元的操作，反之亦然，导频信号被用作测试信号，该导频信号也用于控制接收到的信号的电平 FDM信号，并在多路复用器中进行处理。 用于控制电平的导频信号选择滤波器也用于时分复用，用于选择具有等于导频信号频率的频率并且发生在运算单元的两个输入和输出信号中的每一个中的分量。

公开(公告)号：US20050239492A1

公开(公告)日：2005-10-27

申请号：US10502781

申请日：2003-01-24

申请人： Patrice Senn ,  Faycal Touati ,  Michel Pons

发明人： Patrice Senn ,  Faycal Touati ,  Michel Pons

IPC分类号： H01Q1/22 ,  H01Q1/24 ,  H01Q21/28 ,  H04B7/08 ,  H04M1/00

CPC分类号： H01Q21/28 ,  H01Q1/243 ,  H04B7/08

摘要： The reception device for a mobile telephone terminal includes an antenna coupled to a circuit for reception and processing of the radio waves received by the antenna. The antenna is embodied as a multi-sensor antenna to achieve a given level of spatial diversity whereby the sensors are coupled in parallel to the reception and processing circuit. The reception and processing circuit includes a number of reception and processing stages coupled in parallel to which are connected the sensors of the multi-sensor antenna.

摘要翻译： 用于移动电话终端的接收装置包括耦合到电路的天线，用于接收和处理由天线接收的无线电波。 天线被实现为多传感器天线以实现给定水平的空间分集，由此传感器与接收和处理电路并联耦合。 接收和处理电路包括并联耦合的多个接收和处理级，连接到多传感器天线的传感器。

公开(公告)号：US06622922B1

公开(公告)日：2003-09-23

申请号：US09629686

申请日：2000-08-01

申请人： André Adrial ,  Jacky Bouvier ,  Patrice Senn ,  Marc Renaudin ,  Pascal Vivet

发明人： André Adrial ,  Jacky Bouvier ,  Patrice Senn ,  Marc Renaudin ,  Pascal Vivet

IPC分类号： G06K1906

CPC分类号： H04B5/00 ,  G06K7/0008 ,  H04B5/0056 ,  H04B5/0075

摘要： A micro-electronic component for a portable object is of the type which incorporates digital processing means, and an interface for contact-free electromagnetic coupling with a remote station. The digital processing means can operate according to an operating mode of the request/acknowledgement type, which is substantially insensitive to the propagation time, without a global, regular clock. The component additionally comprises adapter means, which can adapt the signals of the contact-free interface to the signals of the digital processing means and vice versa, in order to permit two-way dialogue with the remote station.

摘要翻译： 用于便携式物体的微电子部件是包括数字处理装置的类型，以及用于与远程站的无接触电磁耦合的接口。 数字处理装置可以根据对传播时间基本上不敏感的请求/确认类型的操作模式进行操作，而不需要全局的规则时钟。 该组件另外包括适配器装置，其可以将无接触接口的信号适配到数字处理装置的信号，反之亦然，以允许与远程站的双向对话。

公开(公告)号：US4588981A

公开(公告)日：1986-05-13

申请号：US534096

申请日：1983-09-20

申请人： Patrice Senn

发明人： Patrice Senn

IPC分类号： H03M3/02 ,  H04B14/06

CPC分类号： H04B14/062 ,  H03M3/454 ,  H03M3/43

摘要： The invention relates to a double integration or dual slope delta-sigma coder.This coder comprises a first adder receiving on an input (36) a signal E(p) to be encoded and on an input (37) the coded signal S(p), a first integrator receiving on an input (32) an output signal of the first adder, a second adder receiving on an input (38) the output signal (31) of the first integrator, an input (39) of the second adder receiving a signal proportional to the coded signal, a second integrator connected to the second adder, a quantizer circuit (43), whereof one input (D) is connected to an output (41) of the second integrator, an output Q of said quantizer circuit supplying the coded signal S(p), wherein the integrators and adders are constituted by circuits comprising operational amplifiers (30, 40) and switched capacitor arrangements (35, 36, 45, 46).

摘要翻译： 本发明涉及双积分或双斜率delta-sigma编码器。 该编码器包括第一加法器，其在输入端（36）上接收要编码的信号E（p）和输入（37）编码信号S（p），第一积分器在输入端（32）上接收输出信号 的第一加法器，第二加法器，在第一积分器的输出信号（31）的输入端（38）上接收第二加法器的输入端（39），接收与编码信号成比例的信号;第二积分器， 第二加法器，量化器电路（43），其中一个输入端（D）连接到第二积分器的输出端（41），所述量化器电路的输出和上升沿和Q上提供编码信号S（p），其中积分器和 加法器由包括运算放大器（30,40）和开关电容器布置（35,36,45,46）的电路构成。

公开(公告)号：US20080212533A1

公开(公告)日：2008-09-04

申请号：US11919582

申请日：2006-04-24

申请人： Benoît Miscopein ,  Eric Batut ,  Jean Schwoerer ,  Patrice Senn

发明人： Benoît Miscopein ,  Eric Batut ,  Jean Schwoerer ,  Patrice Senn

IPC分类号： H04Q7/00

CPC分类号： H04W88/02 ,  H04W88/06

摘要： The invention relates to a method for the reconfiguration of an information processing unit of a terminal (1), said terminal being/arranged in such a way as to receive information from a communication system (2, 3). The inventive method comprises the following steps: a reconfiguration phase of the information processing unit is initiated; and an information message signalling the initiation of the reconfiguration phase of the information processing unit is transmitted from the terminal to the communication system.

摘要翻译： 本发明涉及一种用于重新配置终端（1）的信息处理单元的方法，所述终端以从通信系统（2,3）接收信息的方式配置。 本发明的方法包括以下步骤：启动信息处理单元的重新配置阶段; 并且从终端向通信系统发送表示信息处理单元的重新配置阶段的发起的信息消息。

公开(公告)号：US5555272A

公开(公告)日：1996-09-10

申请号：US228479

申请日：1994-04-15

申请人： Freddy Balestro ,  Patrice Senn

发明人： Freddy Balestro ,  Patrice Senn

IPC分类号： H03H17/02 ,  H04B1/38

CPC分类号： H03H17/0294

摘要： The device comprises a first input (E1) and a first output (S1) which are capable respectively of receiving and delivering a plurality of analog signals and corresponding digital signals having different predetermined types of transmission specifications and associated with substantially homothetic predetermined elementary frequency attenuation templates. A second input (E2) and a second output (S2) are also provided, capable respectively of receiving and delivering a plurality of digital signals and corresponding analog signals having different predetermined types of transmission specifications, associated with different, substantially homothetic predetermined elementary frequency attenuation templates, as well as first and second signal conversion means arranged respectively between the first input and output and between the second input and output and including a single digital filter (6) in common, having a single frequency attenuation template which is compatible with all the elementary templates.

摘要翻译： 该装置包括能够分别接收和传递多个模拟信号的第一输入（E1）和第一输出（S1）以及具有不同预定类型的传输规范并且与基本上相同的预定基本频率衰减模板相关联的相应数字信号 。 还提供了第二输入（E2）和第二输出（S2），其能够分别接收和传送具有不同的预定类型的传输规范的多个数字信号和对应的模拟信号，该不同的预定类型的传输规范与不同的基本上相似的预定基本频率衰减 模板，以及分别布置在第一输入和输出之间以及第二输入和输出之间并且包括共同的单个数字滤波器（6）的第一和第二信号转换装置，具有单个频率衰减模板，其与所有 基本模板