公开(公告)号：US07061260B2

公开(公告)日：2006-06-13

申请号：US10894942

申请日：2004-07-20

申请人： Gerd Frankowsky ,  Thorsten Bucksch ,  Gerd Brösamlen

发明人： Gerd Frankowsky ,  Thorsten Bucksch ,  Gerd Brösamlen

IPC分类号： G01R31/02

CPC分类号： G01R31/3191 ,  G01R31/31905

摘要： A calibration device for the calibration of a tester channel of a tester device is provided. The calibration device includes a connecting device and a planar contact carrier with a first contact area and a second contact area insulated from the first contact area, the first contact area being generally surrounded by the second contact area, so that, when a needle card connected to the tester device is placed onto the contact carrier of the calibration device, one of the contact-connecting needles of the needle card which is connected to the tester channel to be calibrated is placed onto the first contact area and a plurality or all of the further contact-connecting needles of the needle card at tester channels that are not to be calibrated are placed onto the second contact area.

摘要翻译： 提供了用于校准测试器设备的测试器通道的校准装置。 校准装置包括连接装置和具有与第一接触区域绝缘的第一接触区域和第二接触区域的平面接触载体，第一接触区域通常被第二接触区域包围，使得当针卡连接 将测试器装置放置在校准装置的接触载体上，连接到要校准的测试器通道的针卡的接触连接针中的一个被放置在第一接触区域上，并且多个或全部 在未被校准的测试器通道处的针卡的另外的接触连接针被放置在第二接触区域上。

公开(公告)号：US20050046436A1

公开(公告)日：2005-03-03

申请号：US10894942

申请日：2004-07-20

申请人： Gerd Frankowsky ,  Thorsten Bucksch ,  Gerd Brosamlen

发明人： Gerd Frankowsky ,  Thorsten Bucksch ,  Gerd Brosamlen

IPC分类号： G01R31/319 ,  G01R31/26

CPC分类号： G01R31/3191 ,  G01R31/31905

摘要： One embodiment of the invention provides a calibration device for the calibration of a tester channel of a tester device to which integrated components on a substrate wafer can be contact-connected for testing with electrical signals. The calibration device includes a connecting device and a planar contact carrier with a first contact area and a second contact area insulated from the first contact area, which can be electrically connected via the connecting device, the connecting device being suitable for connecting the first and second contact areas to the tester device, the first contact area being generally surrounded by the second contact area, so that, when a needle card connected to the tester device is placed onto the contact carrier of the calibration device, one of the contact-connecting needles of the needle card which is connected to the tester channel to be calibrated is placed onto the first contact area and a plurality or all of the further contact-connecting needles of the needle card at tester channels that are not to be calibrated are placed onto the second contact area.

摘要翻译： 本发明的一个实施例提供了一种用于校准测试器设备的测试器通道的校准装置，衬底晶片上的集成部件可以与其接触连接以便用电信号进行测试。 校准装置包括连接装置和具有第一接触区域和与第一接触区域绝缘的第二接触区域的平面接触载体，所述第一接触区域可以经由连接装置电连接，所述连接装置适于连接第一和第二接触区域 所述第一接触区域通常被所述第二接触区域包围，使得当连接到所述测试器装置的针卡被放置在所述校准装置的接触载体上时，所述接触连接针 将连接到要校准的测试器通道的针卡放置在第一接触区域上，并且将未被校准的测试器通道处的针卡的多个或所有另外的接触连接针放置在 第二接触区域。

公开(公告)号：US07323861B2

公开(公告)日：2008-01-29

申请号：US11065896

申请日：2005-02-25

申请人： Thorsten Bucksch

发明人： Thorsten Bucksch

IPC分类号： G01R31/28

CPC分类号： G01R31/2889

摘要： One embodiment of the invention provides a standardization module for use in standardizing tester channels of a tester unit using a standardization unit for making contact with contact faces which are connected to the tester channels and for standardizing the tester channels. The standardization module has a first surface on which first contact faces are arranged in such a way that contact can be made by a contact making card of the tester unit with the first contact faces in a defined fashion. The standardization module has a second surface on which second contact faces are arranged in such a way that contact can be made with the second contact faces using the standardization unit. Each of the first contact faces is respectively connected to one of the second contact faces.

摘要翻译： 本发明的一个实施例提供了一种用于使用标准化单元标准化测试器单元的测试仪通道的标准化模块，该标准化单元与连接到测试仪通道的接触面接触并标准化测试仪通道。 标准化模块具有第一表面，第一接触面以这样的方式布置，使得可以通过测试器单元的接触卡以限定的方式与第一接触面进行接触。 标准化模块具有第二表面，第二接触面以这样的方式布置，使得可以使用标准化单元与第二接触面进行接触。 每个第一接触面分别连接到第二接触面中的一个。

公开(公告)号：US07061227B2

公开(公告)日：2006-06-13

申请号：US10878681

申请日：2004-06-29

申请人： Thorsten Bucksch ,  Arti Prasad Roth

发明人： Thorsten Bucksch ,  Arti Prasad Roth

IPC分类号： G01R31/02

CPC分类号： G01R31/3191

摘要： A process and device for calibrating a semiconductor component test system includes a first connection, at which a corresponding signal, in particular a calibration signal can be input, and a second and third connection, at which the signal, in particular a calibration signal, can be emitted. The first connection is and/or can be connected via a corresponding line to a first switching apparatus, which is and/or can be connected to the second connection. A second switching apparatus is and/or can be connected to the third connection. Advantageously, the signal is then transferred to the second connection, and barred from the third connection by the first switching apparatus being closed and the second switching apparatus being opened.

摘要翻译： 用于校准半导体部件测试系统的过程和设备包括第一连接，在该第一连接处可以输入相应的信号，特别是校准信号，以及第二和第三连接，在该第二连接处，信号，特别是校准信号可以在该连接 被排出。 第一连接和/或可以经由相应的线路连接到第一开关设备，第一开关设备是和/或可以连接到第二连接。 第二开关装置和/或可以连接到第三连接。 有利地，信号然后被传送到第二连接，并且被第一开关装置关闭并且第二开关装置打开的从第三连接被阻止。

公开(公告)号：US20060107155A1

公开(公告)日：2006-05-18

申请号：US11253814

申请日：2005-10-20

申请人： Thorsten Bucksch ,  Martin Meier

发明人： Thorsten Bucksch ,  Martin Meier

IPC分类号： G01R31/28 ,  G06F11/00

CPC分类号： G11C29/20 ,  G11C29/56 ,  G11C2029/5602

摘要： The invention relates to a semi-conductor component test-procedure, and a semi-conductor component test device (10b), which comprises: a device (43) for generating pseudo-random address values to be applied to corresponding address inputs of a semi-conductor component (2b), in particular a memory component, to be tested.

摘要翻译： 本发明涉及一种半导体部件测试程序和半导体部件测试装置（10b），其包括：用于产生要应用于相应地址输入的伪随机地址值的装置（43） 半导体部件（2b），特别是待测试的存储器部件。

公开(公告)号：US06754869B2

公开(公告)日：2004-06-22

申请号：US09909390

申请日：2001-07-19

申请人： Thorsten Bucksch ,  Ralf Schneider

发明人： Thorsten Bucksch ,  Ralf Schneider

IPC分类号： G06F1100

CPC分类号： G11C29/028 ,  G11C29/02 ,  G11C29/50 ,  G11C29/50012

摘要： For testing, a reference clock signal is applied to a first delay path having a fixed delay and a second delay path having a variable delay. The delay paths are connected to inputs of a clocked circuit to initiate data transfer and they apply a clock signal and a data signal, respectively. The variable delay is set within the range [tF−n&Dgr;t/2; tF+n&Dgr;t/2]. The fixed delay tF is at least n&Dgr;t/2. For calibration, the setting range of the variable delay and the fixed delay are each increased to the k-fold value and the variable delay is incremented in steps from n=0 until three phase changes are detected. The value of n at the first phase cycle completion corresponds to the variable delay for the set-up time and the value of n at the third phase cycle completion corresponds to the variable delay for the hold time.

摘要翻译： 对于测试，参考时钟信号被施加到具有固定延迟的第一延迟路径和具有可变延迟的第二延迟路径。 延迟路径连接到时钟电路的输入以启动数据传输，并分别施加时钟信号和数据信号。 可变延迟设置在[tF-nDeltat / 2; tF + nDeltat / 2]。 固定延迟tF至少为nDeltat / 2。 对于校准，可变延迟和固定延迟的设置范围各自增加到k倍值，并且可变延迟以n = 0的步长增加，直到检测到三相变化。 第一相循环完成时n的值对应于建立时间的可变延迟，第三相循环完成时n的值对应于保持时间的可变延迟。

公开(公告)号：US07421629B2

公开(公告)日：2008-09-02

申请号：US11253814

申请日：2005-10-20

申请人： Thorsten Bucksch ,  Martin Meier

发明人： Thorsten Bucksch ,  Martin Meier

IPC分类号： G11C29/00

CPC分类号： G11C29/20 ,  G11C29/56 ,  G11C2029/5602

摘要： The invention relates to a semi-conductor component test procedure, and a semiconductor component test device (10b), which comprise: a device (43) for generating pseudo-random address values to be applied to corresponding address inputs of a semi-conductor component (2b), in particular a memory component, to be tested.

摘要翻译： 本发明涉及一种半导体元件测试程序和半导体元器件测试器件（10b），它们包括：一个用于产生伪随机地址值的器件（43），用于施加到半导体的相应地址输入 组件（2b），特别是要测试的存储器组件。

公开(公告)号：US07375508B2

公开(公告)日：2008-05-20

申请号：US11167930

申请日：2005-06-28

申请人： Thorsten Bucksch

发明人： Thorsten Bucksch

IPC分类号： G01R31/02

CPC分类号： G11C29/56 ,  G01R1/07342 ,  G01R31/3191 ,  G01R35/005 ,  G11C29/028 ,  G11C2029/5602

摘要： A device and a process for the calibration of a semi-conductor component test systemThe invention relates to a process and a device for the calibration of a probe card and/or of a semi-conductor component test apparatus including a first connection, at which a corresponding signal, in particular a calibration signal can be applied, and a second connection, connected or connectable with the first connection, at which the signal, in particular the calibration signal, can be emitted, and a third connection, at which a corresponding further signal, in particular a calibration signal, can be applied, and a fourth connection, connected or connectable with the third connection, at which the further signal, in particular the calibration signal, can be emitted.

摘要翻译： 用于校准半导体部件测试系统的装置和方法技术领域本发明涉及用于校准探针卡和/或包括第一连接的半导体部件测试装置的方法和装置， 可以应用相应的信号，特别是校准信号，以及与第一连接相连或可连接的第二连接，在该第一连接处可以发射信号，特别是校准信号，以及第三连接，在该第三连接处， 可以应用另外的信号，特别是校准信号，以及连接或可连接到第三连接的第四连接，在该第四连接处可以发射另外的信号，特别是校准信号。

公开(公告)号：US20060156081A1

公开(公告)日：2006-07-13

申请号：US11115390

申请日：2005-04-27

申请人： Thorsten Bucksch

发明人： Thorsten Bucksch

IPC分类号： G11B20/20 ,  G06K5/04 ,  G11B5/00

CPC分类号： G11C29/50 ,  G11C11/401 ,  G11C29/50012 ,  G11C29/56012

摘要： A data buffer component and a semiconductor component test procedure for testing a memory module are provided. At least one memory component with a series-connected buffer is included. The procedure includes testing the memory module by using a pulse signal, which has been chronologically retarded or advanced by a predetermined time period in comparison with the memory module during normal operation.

摘要翻译： 提供了用于测试存储器模块的数据缓冲器部件和半导体部件测试程序。 包含至少一个具有串联缓冲器的存储器组件。 该过程包括使用脉冲信号来测试存储器模块，该脉冲信号在正常操作期间与存储器模块相比在时间上延迟或超前预定时间段。

公开(公告)号：US20060005089A1

公开(公告)日：2006-01-05

申请号：US11167930

申请日：2005-06-28

申请人： Thorsten Bucksch

发明人： Thorsten Bucksch

IPC分类号： G01R31/28 ,  G06F11/00

CPC分类号： G11C29/56 ,  G01R1/07342 ,  G01R31/3191 ,  G01R35/005 ,  G11C29/028 ,  G11C2029/5602

摘要： A device and a process for the calibration of a semi-conductor component test system The invention relates to a process and a device for the calibration of a probe card and/or of a semi-conductor component test apparatus, including a first connection, at which a corresponding signal, in particular a calibration signal can be applied, and a second connection, connected or connectable with the first connection, at which the signal, in particular the calibration signal, can be emitted, and a third connection, at which a corresponding further signal, in particular a calibration signal, can be applied, and a fourth connection, connected or connectable with the third connection, at which the further signal, in particular the calibration signal, can be emitted.

摘要翻译： 用于校准半导体部件测试系统的装置和方法技术领域本发明涉及用于校准探针卡和/或半导体部件测试装置的方法和装置，所述半导体部件测试装置包括第一连接 其中可以应用相应的信号，特别是校准信号，以及可以与第一连接相连或可连接的第二连接，在该第二连接处可以发射信号，特别是校准信号，以及第三连接， 可以应用相应的另外的信号，特别是校准信号，以及可以发射另外的信号，特别是校准信号的与第三连接相连或可连接的第四连接。