Phase inversion temperature emusions for textile scenting
    2.
    发明授权
    Phase inversion temperature emusions for textile scenting 有权
    织物香气的相转变温度

    公开(公告)号:US07884063B2

    公开(公告)日:2011-02-08

    申请号:US12613028

    申请日:2009-11-05

    IPC分类号: C11D3/50

    摘要: A perfume-containing PIT emulsion which is suited to contribute to an excellent and long-lasting scenting of textiles during the use of a dryer. The PIT emulsion is simple for the user to handle and allows the user to better control the user's individual scent experience during the handling of textiles. The PIT emulsions can also be used for aroma therapy purposes and for the scenting of rooms. In addition, a kit made of detergents and the perfume-containing PIT emulsion, which enables the user to obtain optimal laundry scenting results.

    摘要翻译: 含香料的PIT乳液,适用于在烘干机使用过程中有助于纺织品出色和持久的香味。 PIT乳液对于使用者来说很简单,可以让使用者在处理纺织品时更好地控制使用者个人的气味体验。 PIT乳液也可用于芳香疗法目的以及房间的香味。 另外,由洗涤剂和含香料的PIT乳液制成的药盒,使得使用者能够获得最佳的洗衣香气结果。

    Process for phosphating galvanized steel surfaces
    4.
    发明授权
    Process for phosphating galvanized steel surfaces 失效
    镀锌钢表面磷化工艺

    公开(公告)号:US5503733A

    公开(公告)日:1996-04-02

    申请号:US406943

    申请日:1995-03-28

    IPC分类号: C25D11/36

    CPC分类号: C25D11/36

    摘要: The invention relates to a process for phosphating galvanized steel surfaces, preferably electrolytically or hot-dip galvanized surfaces of steel strip, by treating them in a bath or spray with acidic aqueous phosphating solutions, wherein the workpieces are given a d.c. cathodic treatment at the same time. In the process, (a) the phosphating solutions contain Zn.sup.+2 cations in the range from 0.1 to 5 g/l, PO.sub.4.sup.-3 anions in the range from 5 to 50 g/l, NO.sub.3.sup.- anions in the range from 0.1 to 50 g/l, Mn.sup.+2 cations in the range from 0.1 to 5 g/l, and Cu.sup.+2 cations in the range from 0.001 to 1 g/l; (b) the following conditions are used: pH of the phosphating solution in the range from 1.5 to 4.5, temperature of the phosphating solution in the range from 10.degree. to 80.degree. C., treatment time in the range from 1 to 300 sec; and (c) the workpieces are also cathodically treated with a direct current with a density in the range from 0.01 to 100 mA/cm.sup.2 during phosphating.

    摘要翻译: PCT No.PCT / EP93 / 02538 Sec。 371日期:1995年3月28日 102(e)1995年3月28日PCT PCT 1993年9月20日PCT公布。 出版物WO94 / 08074 日期1994年04月14日本发明涉及一种通过用酸性磷酸盐水溶液在浴槽或喷雾中处理它们来镀锌钢表面,优选钢带的电解或热浸镀锌表面的方法,其中给予工件 一个直流 阴极处理同时进行。 在该过程中,(a)磷酸盐溶液含有0.1至5g / l范围内的Zn + 2阳离子,5至50g / l范围内的PO4-3阴离子,NO3-阴离子的范围为0.1至 50g / l,Mn + 2阳离子的范围为0.1至5g / l,Cu + 2阳离子的范围为0.001至1g / l; (b)使用以下条件:磷酸盐溶液的pH在1.5至4.5的范围内,磷酸盐溶液的温度在10至80℃的范围内,处理时间在1至300秒的范围内; 和(c)在磷化过程中,工件也用0.01至100mA / cm 2的密度的直流电进行阴极处理。

    Preparation of porous active yeast granules
    5.
    发明授权
    Preparation of porous active yeast granules 失效
    多孔活性酵母颗粒的制备

    公开(公告)号:US4335144A

    公开(公告)日:1982-06-15

    申请号:US226146

    申请日:1981-01-19

    IPC分类号: C12N1/04 C12C11/18 C12C11/32

    CPC分类号: C12N1/04

    摘要: Porous granules of active yeast are produced by mixing moist yeast having a solids content of 30% to 40% with a gas in an amount of 0.2 to 2.0 times the volume of the yeast, extruding the resultant mixture at a pressure of from 1 to 10 atmospheres through orifices having a length to diameter ratio of about 1:1 to 4:1 and allowing escape of gas from the interior of the resultant extrudate to form pores communicating with the surface to produce porous granules of active yeast. The granules may be dried to produce active dry yeast granules having a total surface area formed by the outside surface plus the interior surface of the granules of at least 1.5 times the total area of the outside surface of the granules. The active dry yeast granules have good vitality and are capable of rapid rehydration and regeneration.

    摘要翻译: 活性酵母的多孔颗粒通过将固体含量为30%至40%的湿酵母与酵母体积的0.2至2.0倍的气体混合而制得,将所得混合物在1至10的压力下挤出 大气通过具有约1:1至4:1的长径比的孔,并允许气体从所得挤出物的内部排出,以形成与表面连通的孔,以产生活性酵母的多孔颗粒。 可以将颗粒干燥以产生具有由外表面加上颗粒的内表面形成的总表面积至少为颗粒外表面总面积的1.5倍的活性干酵母颗粒。 活性干酵母颗粒具有良好的活力,能快速补液和再生。

    Enhancing performance of a memory unit of a data processing device by separating reading and fetching functionalities
    6.
    发明授权
    Enhancing performance of a memory unit of a data processing device by separating reading and fetching functionalities 有权
    通过分离读取和取出功能来提高数据处理设备的存储单元的性能

    公开(公告)号:US07797493B2

    公开(公告)日:2010-09-14

    申请号:US11815981

    申请日:2006-02-13

    IPC分类号: G06F13/28

    摘要: The present invention relates to a data processing device (10) comprising a processing unit (12) and a memory unit (14), and to a method for controlling operation of a memory unit (14) of a data processing device. The memory unit (14) comprises a main memory (16), a low- level cache memory (20.2), which is directly connected to the processing unit (12) and adapted to hold all pixels of a currently active sliding search area for reading access by the processing unit (12), a high-level cache memory (18), which is connected between the low-level cache memory and the frame memory, and a first pre-fetch buffer (20.1), which is connected between the high-level cache memory and the low- level cache memory and which is adapted to hold one search-area column or one search-area line of pixel blocks, depending on the scan direction and scan order followed by the processing unit. Reading and fetching functionalities are decoupled in the memory unit (14). The fetching functionality is concentrated on the higher cache level, while the reading functionality is concentrated on the lower cache level. This way concurrent reading and fetching can be achieved, thus enhancing the performance of a data processing device.

    摘要翻译: 本发明涉及包括处理单元(12)和存储单元(14)的数据处理设备(10),以及用于控制数据处理设备的存储单元(14)的操作的方法。 存储单元(14)包括主存储器(16),低级高速缓存存储器(20.2),其直接连接到处理单元(12)并且适于保持当前活动的滑动搜索区域的所有像素用于读取 处理单元(12)的访问,连接在低级缓存存储器和帧存储器之间的高级缓存存储器(18)和第一预取缓冲器(20.1),其连接在 高级缓存存储器和低级高速缓存存储器,并且其适于保持像素块的一个搜索区域列或一个搜索区域行,这取决于处理单元后面的扫描方向和扫描顺序。 读取和取出功能在存储器单元(14)中解耦。 获取功能集中在较高的缓存级别,而读取功能集中在较低的缓存级别。 这样可以实现并行读取和取出,从而提高数据处理设备的性能。

    Data Processing Apparatus that Provides Parallel Access to Multi-Dimensional Array of Data Values
    7.
    发明申请
    Data Processing Apparatus that Provides Parallel Access to Multi-Dimensional Array of Data Values 有权
    提供并行访问数据值多维数组的数据处理设备

    公开(公告)号:US20080282038A1

    公开(公告)日:2008-11-13

    申请号:US11568004

    申请日:2005-04-21

    IPC分类号: G06F12/00

    摘要: An array of data values, such as an image of pixel values, is stored in a main memory (12). A processing operation is performed using the pixel values. The processing operation defines time points of movement of a multidimensional region (20, 22) of locations in the image. Pixel values from inside and around the region are cached for processing. At least when a cache miss occurs for a pixel value from outside the region, cache replacement of data in cache locations (142) is performed. Locations that store pixel data for locations in the image outside the region (20, 22) are selected for replacement, selectively exempting from replacement cache locations (142) that store pixel data locations in the image inside the region. In embodiments, different types of cache structure are used for caching data values inside and outside the region. In an embodiment the cache locations for pixel data inside the regions support a higher level of output parallelism than the cache locations for pixel data around the region. In a further embodiment the cache for locations inside the region contains sets of banks, each set for a respective line from the image, data from the lines being distributed in a cyclically repeating fashion over the banks.

    摘要翻译: 诸如像素值的图像的数据值阵列存储在主存储器(12)中。 使用像素值执行处理操作。 处理操作定义图像中位置的多维区域(20,22)的移动时间点。 内部和周围区域的像素值被缓存进行处理。 至少当从区域外的像素值发生高速缓存未命中时,执行高速缓存位置(142)中的数据的高速缓存替换。 选择存储用于区域(20,22)以外的图像中的位置的像素数据的位置用于替换,以选择性地免除存储区域内的图像中的像素数据位置的替换高速缓存位置(142)。 在实施例中,不同类型的高速缓存结构被用于缓存区域内外的数据值。 在一个实施例中,区域内的像素数据的高速缓存位置支持比围绕该区域的像素数据的高速缓存位置更高级的输出并行性。 在另一实施例中,区域内的高速缓冲存储器包含一组存储体,每个存储体集合用于来自图像的相应行,来自行的数据以循环重复的方式分布在存储体上。

    Enhancing Performance of a Memory Unit of a Data Processing Device By Separating Reading and Fetching Functionalities
    8.
    发明申请
    Enhancing Performance of a Memory Unit of a Data Processing Device By Separating Reading and Fetching Functionalities 有权
    通过分离读取和获取功能来提高数据处理设备的存储单元的性能

    公开(公告)号:US20080147980A1

    公开(公告)日:2008-06-19

    申请号:US11815981

    申请日:2006-02-13

    IPC分类号: G06F12/08

    摘要: The present invention relates to a data processing device (10) comprising a processing unit (12) and a memory unit (14), and to a method for controlling operation of a memory unit (14) of a data processing device. The memory unit (14) comprises a main memory (16), a low- level cache memory (20.2), which is directly connected to the processing unit (12) and adapted to hold all pixels of a currently active sliding search area for reading access by the processing unit (12), a high-level cache memory (18), which is connected between the low-level cache memory and the frame memory, and a first pre-fetch buffer (20.1), which is connected between the high-level cache memory and the low- level cache memory and which is adapted to hold one search-area column or one search-area line of pixel blocks, depending on the scan direction and scan Reading and fetching functionalities are decoupled in the memory unit (14). The fetching functionality is concentrated on the higher cache level, while the reading functionality is concentrated on the lower cache level. This way concurrent reading and fetching can be achieved, thus enhancing the performance of a data processing device.

    摘要翻译: 本发明涉及包括处理单元(12)和存储单元(14)的数据处理设备(10),以及用于控制数据处理设备的存储单元(14)的操作的方法。 存储单元(14)包括主存储器(16),低级高速缓存存储器(20.2),其直接连接到处理单元(12)并且适于保持当前活动的滑动搜索区域的所有像素用于读取 处理单元(12)的访问,连接在低级缓存存储器和帧存储器之间的高级缓存存储器(18)和第一预取缓冲器(20.1),其连接在 高级缓存存储器和低级高速缓存存储器,其适于保持一个搜索区域列或一个搜索区域的像素块行,这取决于扫描方向和扫描读取和取出功能在存储器单元中去耦 (14)。 获取功能集中在较高的缓存级别,而读取功能集中在较低的缓存级别。 这样可以实现并行读取和取出,从而提高数据处理设备的性能。

    Data processing apparatus that provides parallel access to multi-dimensional array of data values
    9.
    发明授权
    Data processing apparatus that provides parallel access to multi-dimensional array of data values 有权
    提供并行访问数据值多维数组的数据处理设备

    公开(公告)号:US07694078B2

    公开(公告)日:2010-04-06

    申请号:US11568004

    申请日:2005-04-21

    IPC分类号: G06F12/00

    摘要: An array of data values, such as an image of pixel values, is stored in a main memory (12). A processing operation is performed using the pixel values. The processing operation defines time points of movement of a multidimensional region (20, 22) of locations in the image. Pixel values from inside and around the region are cached for processing. At least when a cache miss occurs for a pixel value from outside the region, cache replacement of data in cache locations (142) is performed. Locations that store pixel data for locations in the image outside the region (20, 22) are selected for replacement, selectively exempting from replacement cache locations (142) that store pixel data locations in the image inside the region. In embodiments, different types of cache structure are used for caching data values inside and outside the region. In an embodiment the cache locations for pixel data inside the regions support a higher level of output parallelism than the cache locations for pixel data around the region. In a further embodiment the cache for locations inside the region contains sets of banks, each set for a respective line from the image, data from the lines being distributed in a cyclically repeating fashion over the banks.

    摘要翻译: 诸如像素值的图像的数据值阵列存储在主存储器(12)中。 使用像素值执行处理操作。 处理操作定义图像中位置的多维区域(20,22)的移动时间点。 内部和周围区域的像素值被缓存进行处理。 至少当从区域外的像素值发生高速缓存未命中时,执行高速缓存位置(142)中的数据的高速缓存替换。 选择存储用于区域(20,22)以外的图像中的位置的像素数据的位置用于替换,以选择性地免除存储区域内的图像中的像素数据位置的替换高速缓存位置(142)。 在实施例中,不同类型的高速缓存结构被用于缓存区域内外的数据值。 在一个实施例中,区域内的像素数据的高速缓存位置支持比围绕该区域的像素数据的高速缓存位置更高级的输出并行性。 在另一实施例中,区域内的高速缓冲存储器包含一组存储体,每个存储体集合用于来自图像的相应行,来自行的数据以循环重复的方式分布在存储体上。

    Process for phosphating metallic surfaces
    10.
    发明授权
    Process for phosphating metallic surfaces 失效
    金属表面磷化处理

    公开(公告)号:US5401381A

    公开(公告)日:1995-03-28

    申请号:US129163

    申请日:1993-10-06

    IPC分类号: C25D11/36

    CPC分类号: C25D11/36

    摘要: A process is disclosed for phosphating metallic surfaces, particularly electrolytically or hot dipped galvanized steel strip surfaces, by dip or spray processing the metallic surfaces with acidic aqueous phosphating solutions, wherein the workpieces are cathodically treated at the same time with a direct current. The process is characterized by (a) the use of phosphating solutions that contain the following components: Zn.sup.+2 cations in a range from 0.1 to 5 g/l; PO.sub.4.sup.-3 anions in a range from 5 to 50 g/l; NO.sub.3.sup.- anions in a range from 0.1 to 50 g/l; as well as Ni.sup.+2 cations in a range from 0.1 to 5 g/l and/or Co.sup.+2 cations in a range from 0.1 to 5 g/l; (b) the observance of the following conditions: pH value of the phosphating solutions in a range from 1.5 to 4.5; temperature of the phosphating solutions in a range from 10.degree. to 80.degree. C.; duration of treatment in a range from 1 to 300 sec, (c) simultaneous cathodic treatment of the workpiece during phosphating with a direct current having a density in the range from 0.01 to 100 mA/cm.sup.2.

    摘要翻译: PCT No.PCT / EP92 / 00703 Sec。 371日期:1993年10月6日 102(e)日期1993年10月6日PCT 1991年3月30日PCT公布。 出版物WO92 / 17628 PCT 公开了一种用于磷酸化金属表面,特别是电解或热浸镀锌钢带表面的方法,通过用酸性磷酸盐水溶液浸渍或喷涂处理金属表面,其中工件同时进行阴极处理 用直流电。 该方法的特征在于:(a)使用含有以下组分的磷酸盐溶液:Zn + 2阳离子在0.1至5g / l的范围内; PO4-3阴离子的范围为5〜50g / l; NO3-阴离子在0.1至50g / l的范围内; 以及0.1-5g / l范围内的Ni + 2阳离子和0.1-5g / l范围内的/或Co +2阳离子; (b)遵守以下条件:磷酸盐溶液的pH值在1.5至4.5的范围内; 磷酸盐溶液的温度在10℃至80℃的范围内。 处理持续时间在1至300秒的范围内,(c)在磷酸盐化期间以0.01至100mA / cm 2的密度范围内的直流电同时对工件进行阴极处理。